Design of ramp-stress accelerated life test plans for a parallel system with two independent components using masked data

  • Srivastava, P.W. (Department of Operational Research, Faculty of Mathematical Sciences, University of Delhi) ;
  • Savita, Savita (Department of Operational Research, Faculty of Mathematical Sciences, University of Delhi)
  • 투고 : 2017.08.01
  • 심사 : 2017.12.27
  • 발행 : 2017.12.31

초록

In this paper, we have formulated optimum Accelerated Life Test (ALT) plan for a parallel system with two independent components using masked data with ramp-stress loading scheme and Type-I censoring. Consider a system of two independent and non-identical components connected in parallel. Such a system fails whenever all of its components has failed. The exact component that causes the system to fail is often unknown due to cost and time constraint. For each parallel system at test, we observe its system's failure time and a set of component that includes the component actually causing the system to fail. The stress-life relationship is modelled using inverse power law, and cumulative exposure model is assumed to model the effect of changing stress. The optimal plan consists in finding out the optimum stress rate using D-optimality criterion. The method developed has been explained using a numerical example and sensitivity analysis carried out.

키워드

참고문헌

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