DOI QR코드

DOI QR Code

SEM Controller에 의해 보호되는 SRAM 기반 FPGA의 가용성 분석

Availability Analysis of SRAM-Based FPGAs under the protection of SEM Controller

  • Ryu, Sang-Moon (Department of Information and Control Engineering, Kunsan National University)
  • 투고 : 2016.10.12
  • 심사 : 2016.12.06
  • 발행 : 2017.03.31

초록

고성능 디지털 회로 개발과 구현에 사용되는 SRAM 기반 FPGA(Field Programmable Gate Array)는 configuration memory가 SRAM으로 구현되었기 때문에 configuration memory에 소프트 에러가 발생하는 경우 오동작하게 된다. Xilinx사의 FPGA는 configuration memory 영역에 추가된 ECC(Error Correction Code)와 CRC(Cyclic Redundancy Code) 그리고 이들을 활용하는 SEM(Soft Error Mitigation) Controller를 이용하여 이러한 소프트 에러의 영향을 줄일 수 있다. 본 연구에서는 SRAM 기반 FPGA에서 SEM Controller에 의해 configuration memory 영역이 소프트 에러로부터 보호될 때 FPGA의 신뢰도를 가용성 관점에서 해석하고 그 효과를 분석하였다. 이를 위해 FPGA 계열별 SEM Controller의 소프트 에러 정정 성능에 따른 가용성 함수를 유도하고 FPGA 계열별 사례를 적용하여 비교하였다. 연구 결과는 SRAM 기반 FPGA의 선정 및 가용성 예측에 활용될 수 있을 것으로 기대된다.

SRAM-based FPGAs mainly used to develop and implement high-performance circuits have SRAM-type configuration memory. Soft errors in memory devices are the main threat from a reliability point of view. Soft errors occurring in the configuration memory of FPGAs cause FPGAs to malfunction. SEM(Soft Error Mitigation) Controllers offered by Xilinx can mitigate the influence of soft errors in configuration memory. SEM Controllers use ECC(Error Correction Code) and CRC(Cyclic Redundancy Code) which are placed around the configuration memory to detect and correct the errors. The correction is done through a partial reconfiguration process. This paper presents the availability analysis of SRAM-based FPGAs against soft errors under the protection of SEM Controllers. Availability functions were derived and compared according to the correction capability of SEM Controllers of several different families of FPGAs. The result may help select an SRAM-based FPGA part and estimate the availability of FPGAs running in an environment where soft errors occur.

키워드

참고문헌

  1. P. Adell and G. Allen, "Assessing and Mitigating Radiation Effects in Xilinx FPGAs," in Proceedings of 2008 European Conference on Radiation and Its Effects on Components and Systems, pp. 418-424, 2008.
  2. D. Weigand and M. Harlacher, "A radiation-tolerant lowpower transceiver design for reconfigurable applications," in Proceedings of Earth Science Technology Conference 2002, pp. 9-15, Jun. 2002.
  3. D. Ratter, "FPGAs on Mars," Xcell Journal, vol. 50, pp. 8-11, Fall 2004.
  4. M. Caffrey, T. P. Plaks, and P. M. Athanas, "A space-based reconfigurable radio," in Proceedings of International Conference on Engineering of Reconfigurable Systems and Algorithms, pp. 49-53, Jun. 2002.
  5. M. Caffrey, K. Morgan, D. Roussel-Dupre, S. Robinson, A. Nelson, A. Salazar, M. Wirthlin, W. Howes, and D. Richins, "On-orbit flight results from the reconfigurable cibola flight experiment satellite," in Proceedings of the 17th IEEE Symposium on Field Programmable Custom Computing Machines, Napa: CA, pp. 3-10, Apr. 2009.
  6. B. Bridgford, C. Carmichael, and C. W. Tseng, "Single- Event Upset Mitigation Selection Guide," Xilinx Application Note XAPP987, 2008.
  7. A. Lesea, S. Drimer, J. J. Fabula, C. Carmichael, and P. Alfke, "The rosetta experiment: atmospheric soft error rate testing in differing technology FPGAs," IEEE Transactions on Device and Materials Reliability, vol. 5, no. 3, pp. 317-328, Sep. 2005. https://doi.org/10.1109/TDMR.2005.854207
  8. F. Brosser, E. Milh, V. Geijer, and P. Larsson-Edefors, "Assessing scrubbing techniques for Xilinx SRAM-based FPGAs in space applications," in Proceedings of 2014 International Conference on Field-Programmable Technology, pp. 296-299, 2014.
  9. P. S. Ostler, M. P. Caffrey, D. S. Gibelyou, P. S. Graham, K. S. Morgan, B. H. Pratt, H. M. Quinn, and M. J. Wirthlin, "SRAM FPGA Reliability Analysis for Harsh Radiation Environments," IEEE Transactions on Nuclear Science, vol. 56, no. 6, pp. 3519-3526, Dec. 2009. https://doi.org/10.1109/TNS.2009.2033381
  10. "LogiCORE IP Soft Error Mitigation Controller v3.4.1 Product Guide," Xilinx Product Guide PG036, 2015.
  11. "Soft Error Mitigation Controller v4.1 LogiCORE IP Product Guide," Xilinx Product Guide PG036, 2015.
  12. "UltraScale Architecture Soft Error Mitigation Controller v3.1 LogiCORE IP Product Guide," Xilinx Product Guide PG187, 2016.
  13. S.-M. Ryu, "Availability Analysis of Xilinx 7-Series FPGA against Soft Error," in Proceedings of 2016 fall conference of Korea Institute of Information and Communication Eng., pp. 655-658, 2016.
  14. D. P. Siewiorek and R. S. Swarz, Reliable Computer Systems: Design and Evaluation, Natick, MA: A K Peters, 1998.
  15. "Spartan-6 FPGA Configuration User Guide," Xilinx User Guide UG380, 2016.
  16. "Virtex-6 FPGA Configuration User Guide," Xilinx User Guide UG360, 2015.
  17. "7 Series FPGAs Configuration User Guide," Xilinx User Guide UG470, 2015.
  18. "UltraScale Architecture Configuration User Guide," Xilinx User Guide UG570, 2015.