International Journal of Internet, Broadcasting and Communication

The Institute of Internet, Broadcasting and Communication (한국인터넷방송통신학회)
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The Implementation of Sigma-Delta ADC/DAC Digital Block

  • Park, Sang-Bong (Department of Information and Communication,semyung university) ;
  • Lee, Young Dae (Department of Digital Media Engineering, Anyang University) ;
  • Watanabe, Koki (Department of Information and Communication Engineering, Fukuoka Institute of Technology)
  • Received : 2013.06.12
  • Accepted : 2013.08.09
  • Published : 2013.08.31
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Abstract

This paper describes the sigma-delta ADC/DAC digital block with two channels. The ADC block has comb filter and three half band filters. And the DAC block has 5th Cascaded-of-Integrators Feedback DSM. The ADC and DAC support I2S, RJ, LJ and selectable input data modes of 24bit, 20bit, and 16bit. It is fabricated with 0.35um Hynix standard CMOS cell library. The chip size is 3700*3700um. It has been verified using NC Verilog Simulator and Matlab Tool.

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