한국전자파학회논문지 (The Journal of Korean Institute of Electromagnetic Engineering and Science)

  • 제24권6호
  • /
  • Pages.633-643
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  • 2013
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  • 1226-3133(pISSN)
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  • 2288-226X(eISSN)
한국전자파학회 (The Korean Institute of Electromagnetic Engineering and Science)
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De-Embedding 기술을 이용한 IC 내부의 전원분배망 추출에 관한 연구

Novel Extraction Method for Unknown Chip PDN Using De-Embedding Technique

  • 김종민 (성균관대학교 정보통신공학과) ;
  • 이인우 (삼성전자) ;
  • 김성준 (성균관대학교 정보통신공학과) ;
  • 김소영 (성균관대학교 정보통신공학과) ;
  • 나완수 (성균관대학교 정보통신공학과)
  • Kim, Jongmin (School of Information and Communication Engineering, Sungkyunkwan University) ;
  • Lee, In-Woo (Samsung Electronics) ;
  • Kim, Sungjun (School of Information and Communication Engineering, Sungkyunkwan University) ;
  • Kim, So-Young (School of Information and Communication Engineering, Sungkyunkwan University) ;
  • Nah, Wansoo (School of Information and Communication Engineering, Sungkyunkwan University)
  • 투고 : 2013.03.11
  • 심사 : 2013.05.13
  • 발행 : 2013.06.30
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초록

IC 내부의 전원분배망(PDN: Power Delivery Network) 회로를 분석하기 위해서는 IC의 디자인 정보가 담긴 파일이 필요하지만, 상용 IC(Commercial IC)의 경우 보안상의 이유로 디자인 정보를 제공하지 않고 있다. 하지만 온-칩 전원분배망(On-chip PDN) 특성이 포함된 경우에는 PCB와 패키지의 특성만으로는 정확한 해석이 어려우므로 본 연구에서는 IC 내부의 정보가 제공하지 않는 전원분배망(PDN) 회로의 추출에 관하여 연구를 하였다. IC 내부의 전원분배망(PDN)의 주파수에 대한 특성을 추출하기 위하여, IEC62014-3에서 제안하고 있는 추출용 보드를 제작하였고, 추출용 보드를 구성하고 있는 SMA 커넥터, 패드, 전송 선로, 그리고 QFN 패키지의 주파수에 대한 특성들을 분석하였다. 추출된 결과들은 디임베딩(de-embedding) 기술에 적용하여 IC 내부의 전원분배망(PDN) 회로를 S-parameter 기반으로 모델을 추출하였고, 평가용 보드의 전원분배망 결합회로(PDN Co-simulation)모델에 적용하여 측정과 비교한 결과, ~4 GHz까지 잘 일치하였다.

GDS format files, as well as layout of the chip are noticeably needed so as to analyze the PDN (Power Delivery Network) inside of IC; however, commercial IC in the market has not supported design information which is layout of IC. Within this, in terms of IC having on-chip PDN, characteristic of inside PDN of the chip is a core parameter to predict generated noise from power/ground planes. Consequently, there is a need to scrutinize extraction method for unknown PDN of the chip in this paper. To extract PDN of the chip without IC circuit information, the de-embedding test vehicle is fabricated based on IEC62014-3. Further more, the extracted inside PDN of chip from de-embedding technique adopts the Co-simulation model which composes PCB, QFN (Quad-FlatNo-leads) Package, and Chip for the PDN, applied Co-simulation model well corresponds with impedance from measured S-parameters up to 4 GHz at common measured and simulated points.

키워드

참고문헌

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