DOI QR코드

DOI QR Code

Electrical Parameter Extraction of High Performance Package Using PEEC Method

  • Pu, Bo (Department of Electrical and Electronics Engineering, Sungkyunkwan University) ;
  • Lee, Jung-Sang (Department of Electrical and Electronics Engineering, Sungkyunkwan University) ;
  • Nah, Wan-Soo (Department of Electrical and Electronics Engineering, Sungkyunkwan University)
  • 투고 : 2010.11.26
  • 심사 : 2011.03.07
  • 발행 : 2011.03.31

초록

This paper proposes a novel electrical characterization approach for a high-performance package system using an improved Partial Element Equivalent Circuit (PEEC). As the effect of interconnects becomes a pivotal factor for the performance of high-speed electronic systems, there is a great demand for an accurate equivalent model for interconnects. In particular, an equivalent model of interconnects is established in this paper for the Fine-Pitch Ball Grid Array (FBGA) package using the improved PEEC method. Based on the equivalent model, electrical characteristics are analyzed; furthermore, these are verified through the measurement results of a Vector Network Analyzer (VNA).

키워드

참고문헌

  1. J. Ekman, G. Antonini, A. Orlandi, and A. E. Ruehli, "Impact of partial element accuracy on PEEC model stability," IEEE Trans. Electromagn. Compatibility, vol. 48, no. 1, pp. 19-31, Feb. 2006. https://doi.org/10.1109/TEMC.2006.870699
  2. A. Musing, J. W. Kolar, "Efficient partial element calculation and the extension to cylindrical elements for the PEEC method," IEEE Trans. on Magnetics, vol. 45, no. 3, pp. 1-6, Mar. 2009. https://doi.org/10.1109/TMAG.2009.2013079
  3. F. Stellari, A. L. Lacaita, "New formulas of interconnect capacitances based on results of conformal mapping method," IEEE Trans. Electron Devices, vol. 47, pp. 222-231, Jan. 2000. https://doi.org/10.1109/16.817589
  4. A. E. Ruehli, "Equivalent circuit models for three-dimensional multiconductor systems," IEEE Trans. Microwave Theory Tech., vol. MTT-22, no. 3, pp. 216-221, Mar. 1974.
  5. N. Pham, B. Mutnury, E. Matoglu, M. Cases, and D. N. de Araujo, "Package model for efficient simulation, design, and characterization of high performance electronics system," in Proc. IEEE Workshop on Signal Propagation on Interconnects, pp. 39-42, May 2006.
  6. M. F. Cagiiano, E. Barkley, M. Sun, and J. T. Kleban, "Electrical modeling of the chip scale ball grid array package at radio frequencies," Microelectronics Journal, vol. 31, pp. 701-709, 2000. https://doi.org/10.1016/S0026-2692(00)00047-1
  7. C. R. Paul, Inductance-Loop and Partial, Wiley Interscience Publication, 2010.
  8. B. Pu, J.-S. Lee, J. Kim, and Wansoo Nah, "Modeling of FBGA package for high performance digital system," IEEE2011 Asia-Pacific Electromagnetic Compatibility Symposium, May 2011.
  9. X. Qi, C. P. Yue, T. Arnborg, H. T. Soh, H. Sakai, Z. Yu, and R. W. Dutton, "A fast 3-D modeling approach to electrical parameter extraction of bonding wires for RF circuit," IEEE Trans. Advanced Packaging, vol. 23, no. 3, Aug. 2000.