Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Study of Nonvolatile Memory Device with SiO2/Si3N4 Stacked Tunneling Oxide

SiO2/Si3N4 터널 절연악의 적층구조에 따른 비휘발성 메모리 소자의 특성 고찰

  • 조원주 (광운대학교 전자재료공학과)
  • Published : 2009.01.01
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Abstract

The electrical characteristics of band-gap engineered tunneling barriers consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were investigated for nonvolatile memory device applications. The band structure of band-gap engineered tunneling barriers was studied and the effectiveness of these tunneling barriers was compared with the conventional tunneling $SiO_2$ barrier. The band-gap engineered tunneling barriers composed of thin $SiO_2$ and $Si_3N_4$ layers showed a lower operation voltage, faster speed and longer retention time than the conventional $SiO_2$ tunnel barrier. The thickness of each $SiO_2$ and $Si_3N_4$ layer was optimized to improve the performance of non-volatile memory.

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