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CSL-NOR형 SONOS 플래시 메모리의 멀티비트 적용에 관한 연구

Investigation for Multi-bit per Cell on the CSL-NOR Type SONOS Flash Memories

  • 김주연 (울산과학대학 전기전자통신학부 반도체응용전공) ;
  • 안호명 (광운대학교 전자재료공학과) ;
  • 이명식 (광운대학교 전자재료공학과) ;
  • 김병철 (진주산업대학교 전자공학과) ;
  • 서광열 (광운대학교 전자재료공학과)
  • 발행 : 2005.03.01

초록

NOR type flash 32 ${\times}$ 32 way are fabricated by using the typical 0.35 ${\mu}{\textrm}{m}$ CMOS process. The structure of array is the NOR type with common source line. In this paper, optimized program and erase voltage conditions are presented to realize multi-bit per cell at the CSL-NOR array. These are considered selectivity of selected bit and disturbances of unselected bits. Retention characteristics of locally trapped-charges in the nitride layer are investigated. The lateral diffusion and vertical detrapping to the tunneling oxide of locally trapped charges as a function of retention time are investigated by using the charge pumping method. The results are directly shown by change of the trapped-charges quantities.

키워드

참고문헌

  1. The International Technology Roadmap for Semiconductor(ITRS), table 38a, 2001
  2. B. Eitan, P. Pavan, I. Bloom, E. Aloni, A. Frommer, and D. Finzi, 'NROM: a novel localized trapping, 2-bit nonvolatile memory cell', IEEE Electron Device Letters, Vol. 21, No. 11, p. 543, 2000 https://doi.org/10.1109/55.877205
  3. S. Tiwari et al. 'A silicon nanocrystals based memory', Appl. Phys. Lett. Vol. 68, p, 1377, 1996 https://doi.org/10.1063/1.115651
  4. H. A. R. Wegener, A. J Lincoln, H. C. Pao, M. R. O'Connell, and R. E. Oleksiak, 'The variable threshold transistor, a new electrically alterable, non-destructive read-only storage device', IEEE IEDM Tech. Dig., Washington, D. C., p, 70, 1967
  5. F. L. Hampton and J. R. Cricchi, 'Space charge distribution limitation on scale down of MNOS memory devices', IEEE IEDM Tech. Dig., p. 374, 1979
  6. Ho-Myoung An, Myung-Shik Lee, KwangYell Seo, Byoung-Cheul Kim, and Joo- Yeon Kim, 'An investigation of locally trapped charge distribution using the charging pumping method in the two-bit SONOS cell', Trans. EEM, Vol. 5, No.4, p. 148, 2004
  7. 김주연, 'SONOS구조를 갖는 멀티비트 소자의 프로그램 특성', 전기전자재료학회논문지, 16권 9호, p. 771, 2003
  8. Chun Chen and Tso-Ping Ma, 'Direct lateral profile of hot-carrier-induced oxide charge and interface traps in thin gate MOSFET's', IEEE Trans. Electron Dev., Vol. 45, No. 11, p. 512, 1998