Journal of electromagnetic engineering and science

  • 제4권2호
  • /
  • Pages.56-62
  • /
  • 2004
  • /
  • 2671-7255(pISSN)
  • /
  • 2671-7263(eISSN)
한국전자파학회 (The Korean Institute of Electromagnetic Engineering and Science)
권호 표지

Multi-Gbit/s Digital I/O Interface Based on RF-Modulation and Capacitive Coupling

  • Shin, Hyunchol (Department of Radio Science and Engineering, Kwangwoon University)
  • Published : 2004.06.01
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

Abstract

We present a multi-Gbit/s digital I/O interface based on RF-modulation and capacitive-coupling over an impedance matched transmission line. The RF-interconnect(RFI) can greatly reduce the digital switching noise and eliminate the dc power dissipation over the channel. It also enables reduced signal amplitude(as low as 200 ㎷) with enhanced data rate and affordable circuit overhead. This paper addresses the system advantages and implementation issues of RFI. A prototype on-chip RFI transceiver is implemented in 0.18-${\mu}{\textrm}{m}$ CMOS. It demonstrates a maximum data rate of 2.2 Gbit/s via 10.5-㎓ RF-modulation. The RFI can be very instrumental for future high-speed inter- and intra-ULSI data links.

Keywords

References

  1. Proceedings of the IEEE v.89 no.3 Interconnect limits on gigascale integration(GSI) in the 21st century J. A. Davis;R. Venkatesan;A. Kaloyeros;M. Beylansky;S. J. Souri;K. Banerjee;K. C. Saraswat;A. Rahman;R. Rief;J. D. Meindl https://doi.org/10.1109/5.915376
  2. IEEE International Solid-State Circuit Conference Dig. Tech. Papers A CMOS low-voltage-swing transmission-line transceiver B. Gunning;L. Yuan;T. Nguyen;T. Wong
  3. Rambus Signaling Level
  4. IEEE J. Solid-State Circuits v.32 no.3 Capacitive Coupling and Quantized Feedback Applied to Conventional CMOS Technology T. J. Gabara;W. C. Fischer https://doi.org/10.1109/4.557640
  5. IEEE Tech. Dig. Int. Interconnect Technology Conference Multi-I/O and reconfigurable RF/wireless interconnect based on near field capacitive coupling and multiple access techniques M. F. Chang;V. Roychowdhury;L. Zhang;S. Zhou;Z. Wang;Y. Wu;P. Ma;C. Lin;Z. Kang
  6. Proceedings of the IEEE RF/wireless interconnect for inter- and intra-chip communicatons M. F. Chang;V. Roychowdhury;L. Zhang;H. Shin;Y. Qian
  7. Tech. Dig. IEEE Int. Electron Device Meeting RF-interconnect for future inter- and intra-ULSI communications M. F. Chang;H. Shin;L. Zhang
  8. IEEE Int. Microwave Symposium RF-Interconnect for Multi-Gb/s Digital Interface Based on 10-GHz RF-Modulation in 0.18 $\mu$m CMOS H. Shin;Z. Xu;M. F. Chang
  9. Phaselock Technique F. M. Gardner
  10. IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers I/O family with 200 mV to 500 mV supply voltage M. Hedberg;T. Haulin
  11. IEEE J. Solid-State Circuits v.36 no.7 Optimum voltage swing on on-chip and off-chip interconnect C. Svensson https://doi.org/10.1109/4.933468
  12. Proc. IEEE Int. Symposium on Circuits and Systems v.3 Highly linear variable gain amplifiers with programmable temperature compensation for CDMA wireless applications H. Shin;D.-J. Keum;J.-S. Choi;D.-Y. Jung;B.-H. Park