Novel Ni-Silicide Structure Utilizing Cobalt Interlayer and TiN Capping Layer and its Application to Nano-CMOS

Cobalt Interlayer 와 TiN capping를 갖는 새로운 구조의 Ni-Silicide 및 Nano CMOS에의 응용

  • 오순영 (충남대학교 전자공학과) ;
  • 윤장근 (충남대학교 전자공학과) ;
  • 박영호 (충남대학교 전자공학과) ;
  • 황빈봉 (충남대학교 전자공학과) ;
  • 지희환 (충남대학교 전자공학과) ;
  • 왕진석 (충남대학교 전자공학과) ;
  • 이희덕 (충남대학교 전자공학과)
  • Published : 2003.12.01

Abstract

In this paper, a novel Ni silicide technology with Cobalt interlayer and Titanium Nitride(TiN) capping layer for sub 100 nm CMOS technologies is presented, and the device parameters are characterized. The thermal stability of hi silicide is improved a lot by applying co-interlayer at Ni/Si interface. TiN capping layer is also applied to prevent the abnormal oxidation of NiSi and to provide a smooth silicidc interface. The proposed NiSi structure showed almost same electrical properties such as little variation of sheet resistance, leakage current and drive current even after the post silicidation furnace annealing at $700^{\circ}C$ for 30 min. Therefore, it is confirmed that high thermal robust Ni silicide for the nano CMOS device is achieved by newly proposed Co/Ni/TiN structure.

본 논문에서는 cobalt interlayer와 TiN capping을 적용한 Ni-Silicide 구조를 제안하여 100 ㎜ CMOS 소자에 적용하고 소자 특성 연구를 하였다. Ni-Silicide의 취약한 열 안정성을 개선하기 위해 열 안정성이 우수한 Cobalt interlayer이용하여 silicide의 열화됨을 개선하였고 또한 silicide 계면의 uniformity를 향상하기 위해 TiN capping을 동시에 적용하였다. 100 ㎚ CMOS 소자에 제안한 Co/Ni/TiN 구조를 적용하여 700℃, 30분에서의 열처리 시에도 silicide의 낮은 면저항과 낮은 접합 누설 전류가 유지되었으며 100 ㎚이하 소자의 특성 변화도 거의 없음을 확인하였다. 따라서 제안한 Co/Ni/TiN 구조가 NiSi의 열 안정성을 개선시킴으로써 100 ㎚ 이하의 Nano CNOS 소자에 매우 적합한 Ni-Silicide 특성을 확보하였다.

Keywords

References

  1. S. P. Muraka, 'Self-aligned silicides or metals for very large integrated circuit applications', Journal of Vacuum Science and Technology B4,pp. 1325-1331, 1986 https://doi.org/10.1116/1.583514
  2. 이헌진, 지희환, 배미숙, 안순의, 박성형, 이기민, 이주형, 왕진석, 이희덕, '100nm 이하의 CMOS소자를 위한 Ni Silicide Technology', 대한 전자공학회, 하계학술대회 논문집, Vol.2, p.237, 2002
  3. Chel-Jong CHOI, Young-Woo OK, Tae-Yeon SEONG, Hi-Deok LEE, 'Effects of a $SiO_2$ Capping Layer on the Electrical Properties and Morphology fo Nickel Silicides', J. Appl. Phys, Vol. 41, pp.1-5, 2002 https://doi.org/10.1143/JJAP.41.1
  4. K. Gato, A. Fushida, J. Watanabe, T. Sukegawa, K. Ka wa mura, T. Yamazaki, T. Sugii, 'Leakage mechanism and optimized conditions of Co salicide process for deep-submicronMOS devices', IEDM 95, pp.449-452, 1995 https://doi.org/10.1109/IEDM.1995.499235
  5. E. G. Colgan, J. P. Gambino, 'Formation and stability of silicides onsilicon', Material Science & Engineering, Review Reports, Vol. R16, No.2, pp. 43-96, 1996 https://doi.org/10.1016/0927-796X(95)00186-7
  6. F. Deng, R. A. Johnson, W. B. Dubbelday, G. A. Garcia ,P. M. Asbeck, S. S. Lau, 'Salicide process for 400 A fully-depleted SOI-MOSFETs using NiSi', SOI Conference Proceedings, IEEE International, pp.22-23, 1997 https://doi.org/10.1109/SOI.1997.634913
  7. T. Morimoto, T. Ohguro, H. S. Momose, T. Iinuma, et al, 'Self - Aligned Nickel - Mono - Silicide Technology for High-speed Deep Submicro meter Logic CMOS ULSI', IEEE Trans. Electron Devices, Vol.42, No.5, pp. 915-922, 1995 https://doi.org/10.1109/16.381988
  8. T. Morimoto, H. S. Momose, T. Iinuma, I. Kunishima, K. Suguro, H.Okana, I. Katakabe, H. Nakajima, M. Tsuchiaki, M. Ono, Y. Katsumata and H. Iwai, 'A NiSi salicide technology for advanced logic devices', Tech. Dig. ofIEDM, pp.653-656, 1991 https://doi.org/10.1109/IEDM.1991.235387
  9. J. Chen, J. P. Colinge, D. Flandre, R.Gillon, J. P. Raskin, and D. Vanhoe nacker, 'Comparison of $TiSi_2$, $CoSi_2$ and NiSi for Thin-Film Silicon-on-Insulator Applications', J. Elec-trochem Soc., Vol.144, No.7, 1997 https://doi.org/10.1149/1.1837833AdditionalInformation
  10. M. A. Nicolet and S. S. Lau, 'Formation and characterization of transition-metal silicides', VLSI Electronics Microstructure Science, vol.6, Chapter 6, Academic Press, p.457, 346, 358, 1983
  11. T. H. Hou, T. F. Lei and T. S. Chao, 'Im-provement of junction leakage of nickel silicided junction by a Ti-capping layer', IEEE Electron Device Lett., 20, p.572, 1999 https://doi.org/10.1109/55.798047
  12. D. Z. Chi, D. Mangelinck, S. K. Lahiri, P. S. Lee and K. L. Pey, 'Comparative study of current-voltage characteristics of Ni and Ni (Pt)-alloy silicided p+n diodes', Appl, Phys, Lett. 78, p.3256, 2001 https://doi.org/10.1063/1.1374496
  13. T. Ohguro, et al. Iwai, 'Nitrogen-doped nickel monosilicide technology for deep submicron CMOS salicide', in IEDM Tech. Dig., p. 453, 1995 https://doi.org/10.1109/IEDM.1995.499236
  14. C. detavernier, R. L. Van Meirhaneghe, F. Cardon, R. A. Donaton, K. Maex, 'The influence of Ti capping layers on $CoSi_2$ formation', Miicroelectronic Engineering 50, pp. 125-132, 2000 https://doi.org/10.1016/S0167-9317(99)00272-5
  15. Hong-Xiang Mo, Xin-Ping Qu, Jian-Hai Liu, Guo-Ping Ru, Bing-Zong Li, 'Formation and properties of ternary silicide (CoxNil-x) $Si_2$ thin films', Solid-State and Integrated Circuit Technology, Proceedings. 5th International pp. 271-274, 1998 https://doi.org/10.1109/ICSICT.1998.785872