Improvement in Memory Characteristics of Charge Trap Memory Capacitor with High-k Materials as Engineered Tunnel Dielectrics and Charge Trap Layer

엔지니어드된 터널 절연막과 전하트랩층에 고유전 물질을 적용한 전하 트랩형 메모리 캐패시터의 메모리 특성 개선

The memory characteristics of charge trap memory capacitor with high-k materials were investigated. I-V characteristics of the fabricated device with band gap engineered tunneling gate stacks consisted of $SiO_2$, $ZrO_2$, $Al_2O_3$ dielectrics were evaluated and compared with the one consisted of $SiO_2$ tunneling dielectric. The memory capacitor including engineered tunneling dielectrics of ($Al_2O_3/ZrO_2/SiO_2$) shows the fastest PIE speed and long data retention time.