Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
권호 표지

The Analysis of I-V characteristics on n-channel offset gated poly-Si TFT`s

Offset 구조를 갖는 n-채널 다결정 실리콘 박막 트랜지스터의 I-V 분석

  • 변문기 (수원대학교 전자재료공학과) ;
  • 이제혁 (수원대학교 전자재료공학과) ;
  • 김동진 (유한대학 전자과) ;
  • 조동희 (수원대학교 전자재료공학과) ;
  • 김영호 (수원대학교 전자재료공학과)
  • Published : 1999.05.01
Download PDF
⟨ Previous Next ⟩

Abstract

The I-V characteristics of the n-channel offset gated poly-Si TETs have been systematically investigated in order to analyse the effects of offset region. The on currents are reduced due to the series resistance by the offset length and there is no kink phenomenon in offset devices. The off currents of the offset gated TFTs are remarkably reduced to 10$^{-12}$ A independent of gate and drain voltage because the electric field is weakened by the increase of the depletion region width near the drain region. It is shown that the offset regions behave as a series resistance and reduce lateral and vertical electric field.

Keywords