• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.4
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• pp.39-52
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• 2000

A design of 2 stage S-DLVA(successive detector log video amplifier) was studied to detect wide dynamic radar pulse ranging from -70 ㏈m to 0㏈m. A basic design idea was focused on the linear detection in logarithmic scale of wide dynamic range radar pulses from nosie-like weak power of -70 ㏈m to relatively high power 0 ㏈m. It is highly formidable, since it requires high speed detection less than 10 nsec over the operating frequency ranges from 6 to 18 ㎓. A limiter diode, a tunnel diode and an L17-C were used as a protecting device, a detector diode and a log video amplifier in companion as a single stage detector to give voltage output proportional to the input power of about 35 ㏈ dynamic range. A protype of 2-stage DLVA having one more single stage detector was fabricated with a 32 ㏈ low noise amplifier and a 3 ㏈ hybrid coupler to provide total 70 ㏈ dynamic range detection. The logging characteristics were measured to have log slope of 25m.V/㏈ against 70 ㏈ logging range from -55 ㏈m to +15 ㏈m, the log linearity of within +/- 1.5 ㏈, and tangential sensitivity was at -63 ㏈m. The pulse dynamics of rise time and recovery time were measured as 50 nsec and 1.2 $\mu$sec, respectively. The reason might be due to the parasitic capacitances of packaged limiter, tunnel diode, and L17-C.

• Journal of Power Electronics
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• v.10 no.2
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• pp.115-124
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• 2010

In this paper, a simple yet efficient auto mode-hop ripple control structure for buck converters with light load operation enhancement is proposed. The converter, which operates under a wide range of input and output voltages, makes use of a state-dependent hysteretic comparator. Depending on the output current, the converter automatically changes the operating mode. This improves the efficiency and reduces the output voltage ripple for a wide range of output currents for given input and output voltages. The sensitivity of the output voltage to the circuit elements is less than 14%, which is seven times lower than that for conventional converters. To assess the efficiency of the proposed converter, it is designed and implemented with commercially available components. The converter provides an output voltage in the range of 0.9V to 31V for load currents of up to 3A when the input voltage is in the range of 5V to 32V. Analytical design expressions which model the operation of the converter are also presented. This circuit can be implemented easily in a single chip with an external inductor and capacitor for both fixed and variable output voltage applications.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.2
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• pp.168-175
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• 2009

This paper proposes an enhanced algorithm for sensorless control of 45,000rpm/22kw type Permanent Magnetic Synchronous Motor (PMSM) with air-foil bearing. The proposed algorithm is based on iterative adaptive flux observer for sensorless control of the motor in wide speed range by on-line estimating angle and velocity of rotor. Simulation error between actual and estimated angle of rotor is analyzed to enhance characteristics of frequency response of conventional adaptive flux observer, which results in stable response in wide range of speed. Using the iteration number for stable phase-delay characteristics, the observer enhances the dynamic characteristics of the observer within current control period. The experiment results show the reliable performance of the proposed algorithm through starting to high speed operating range.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.63-70
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• 2013

This paper describes a high PSRR low-dropout(LDO) linear regulator for wide frequency range without output-capacitor. Owing to both of the cascode compensation technique and the current buffer compensation technique in nested Miller compensation loop, the proposed LDO not only maintaines high stability but also achieves high PSRR over wide frequency range with reasonable on-chip capacitances. Since the external capacitor is removed by the proposed compensation techniques, the cost for pad is eliminated. The designed LDO works under the input voltage range from 2.5V to 4.5V and provides up to 10mA load current with the output voltage of 1.8V. The LDO was implemented with 0.18um CMOS technology and the area is 300um X 120 um. The measured power supply rejection ratio(PSRR) is -76dB and -43dB at DC and 1MHz, respectively. The operating current is 25uA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.4
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• pp.34-42
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• 2012

In this paper, a wide-input range CMOS multi-mode rectifier for wireless power transfer system is presented. The output voltage of multi-mode rectifier is sensed by comparator and switches are controlled based on it. The mode of multi-mode rectifier is automatically selected by the switches among full-wave rectifier, 1-stage voltage multiplier and 2-stage voltage multiplier. In full-wave rectifier mode, the rectified output DC voltage ranges from 9 V to 19 V for a input AC voltage from 10 V to 20 V. However, the input-range of the multi-mode rectifier is more improved than that of the conventional full-wave rectifier by 5V, so the rectified output DC voltage ranges from 7.5 V to 19 V for a input AC voltage from 5 V to 20 V. The power conversion efficiency of the multi-mode rectifier is 94 % in full-wave rectifier mode. The proposed multi-mode rectifier is fabricated in a $0.35{\mu}m$ CMOS process with an active area of $2500{\mu}m{\times}1750{\mu}m$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.408-420
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• 2003

This paper describes a Delay Locked Loop (DLL) circuit having two advancements : 1) a dual loop operation for a wide lock-range and 2) programmable replica delays using antifuse circuitry and internal voltage generator for a post-package skew calibration. The dual loop operation uses information from the initial time-difference between reference clock and internal clock to select one of the differential internal loops. This increases the lock-range of the DLL to the lower frequency. In addition, incorporation with the programmable replica delay using antifuse circuitry and internal voltage generator allows for the elimination of skews between external clock and internal clock that occur from on and off-chip variations after the package process. The proposed DLL, fabricated on 0.16m process, operates over the wide range of 42MHz - 400MHz with 2.3v power supply. The measured results show 43psec peak-to-peak jitter and 4.71psec ms jitter consuming 52㎽ at 400MHz.

• Nuclear Engineering and Technology
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• v.32 no.2
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• pp.128-141
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• 2000

The critical heat flux (CHF）experiments have been carried out in a wide range of pressures for an internally heated vertical annulus. The experimental conditions covered ranges of pressures from 0.57 to 15.01 MPa, mass fluxes of 0 kg/$m^2$s and from 200 to 650 kg/$m^2$s, and inlet subcoolings from 85 to 413 kJ/kg. The characteristics of the present data and the effect of pressure on CHF are discussed. Most of the CHFs were identified to dryout of the liquid film in the annular or annular-mist flow. For the mass flux of 200 kg/$m^2$s, there were the indications that the CHF occurred at the transition from annular to annular-mist How in the pressure range of 3~10 MPa. For the mass fluxes of 550 and 650 kg/$m^2$s, the CHFs had a maximum value at a pressure of 2~3 MPa, and the pressure at the maximum CHF values had a trend moving toward the pressure at the peak value of pool boiling CHF as the mass flux decreased. The CHF data under a zero mass flux condition indicate that both the effects of pressure and inlet subcooling on the CHF were smaller, compared with those on the CHF with net water upward flow.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2024-2034
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• 2016

This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.

• Current Optics and Photonics
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• v.8 no.2
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• pp.162-169
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• 2024

This study investigates the temperature sensitivities of fiber Bragg grating (FBG) across a broad temperature spectrum ranging from -196 ℃ to 900 ℃. We developed the FBG temperature measurement system using a high-temperature tubular furnace and liquid nitrogen to supply consistent high and low temperatures, respectively. Our research showed that the FBG temperature sensitivity changed from 1.55 to 10.61 pm/℃ in the range from -196 ℃ to 25 ℃ when the FBG was packaged with a quartz capillary. In the 25-900 ℃ range, the sensitivity varied from 11.26 to 16.62 pm/℃. Contrary to traditional knowledge, the FBG temperature sensitivity was not constant. This inconsistency primarily stems from the nonlinear shifts in the thermo-optic coefficient and thermal expansion coefficient across this temperature spectrum. The theoretically predicted and experimentally determined temperature sensitivities of FBGs encased in quartz capillary were remarkably consistent. The greatest discrepancy, observed at 25 ℃, was approximately 1.3 pm/℃. Furthermore, it was observed that at 900 ℃, the FBG was rapidly thermally erased, exhibiting variable reflected intensity over time. This study focuses on the advancement of precise temperature measurement techniques in environments that experience wide temperature fluctuations, and has considerable potential application value.

• Journal of KIISE:Information Networking
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• v.37 no.1
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• pp.27-34
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• 2010

In this paper, we examine a long-range dependence in an active measurement of a network traffic which has been a well known characteristic from analyses of a passive network traffic measurement. To this end, we utilize RTT(Round Trip Time), which is a typical active measurement measured by PingER project, and perform a relevant analysis to a time series of both RTT and its volatilities. The RTT time series exhibits a long-range dependence or a 1/f noise. The volatilities, defined as a higher-order variation, follow a log-normal distribution. Furthermore, volatilities show a long-range dependence in relatively short time intervals, and a long-range dependence and/or 1/f noise in long time intervals. From this study, we find that the long-range dependence is a characteristic of not only a passive traffic measurement but also an active measurement of network traffic such as RTT. From these findings, we can infer that the long-range dependence is a characteristic of network traffic independent of a type of measurements. In particular, an active measurement exhibits a 1/f noise which cannot be usually found in a passive measurement.