• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.340-343
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• 1999

In this paper, we propose a wide range PLL(Phase Locked Loop) for 64X CD-ROMs & l0X DVD-ROMs. The frequency locking range of the Proposed PLL is 75MHz~370MHz. To reduce jitters caused by large VCO gain and supply voltage noise, a new V-I converter and a differential delay cell are used in 3-stage ring VCO, respectively. The new V-I converter has a 0.6V ~ 2.5V wide input range. In addition, we propose a new charge pump which has perfect current matching characteristics for the sourcing/sinking current. This new charge pump improves the locking time and the locking range of the PLL. This Chip is implemented in 0.25${\mu}{\textrm}{m}$ CMOS process. It consumes 55㎽ in worst case with a single 2.5V power supply.

• Journal of the Society of Naval Architects of Korea
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• v.52 no.1
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• pp.88-95
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• 2015

For the frequency-domain spectral fatigue analysis, the probability density function of stress range needs to be estimated based on the stress spectrum only, which is a frequency domain representation of the response. The probability distribution of the stress range of the narrow-band spectrum is known to follow the Rayleigh distribution, however the PDF of wide-band spectrum is difficult to define with clarity due to the complicated fluctuation pattern of spectrum. In this paper, efforts have been made to figure out the links between the probability density function of stress range to the structural response of wide-band Gaussian random process. An artificial neural network scheme, known as one of the most powerful system identification methods, was used to identify the multivariate functional relationship between the idealized wide-band spectrums and resulting probability density functions. To achieve this, the spectrums were idealized as a superposition of two triangles with arbitrary location, height and width, targeting to comprise wide-band spectrum, and the probability density functions were represented by the linear combination of equally spaced Gaussian basis functions. To train the network under supervision, varieties of different wide-band spectrums were assumed and the converged probability density function of the stress range was derived using the rainflow counting method and all these data sets were fed into the three layer perceptron model. This nonlinear least square problem was solved using Levenberg-Marquardt algorithm with regularization term included. It was proven that the network trained using the given data set could reproduce the probability density function of arbitrary wide-band spectrum of two triangles with great success.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2001.05a
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• pp.65-71
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• 2001

Absorbers such as porous materials and panels have limited absorption characteristics to some frequency bands. There is a need for absorbers with high absorption coefficients in a wide frequency ranges to make good response of room acoustics. This is almost impossible for a single absorption material. Composite absorption structure with cover, porous material. and air gap is known to have those wide frequency characteristics. In this basis. various composite absorption structures are measured and investigated as wide range absorption structures. Measurements are performed according to an international standard, ISO 354. Various surface types such as wooden slits, wood/steel perforated panels are selected as surface covers, and also various porous materials such as polyurethanes, polyesters, and glasswools are used inside the covers. Result shows that the area of void parts of surface materials is critical to high frequency absorptions, and thickness of air gaps are critical factor of the peak absorptions of low frequency bands.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2008.11a
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• pp.139-140
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• 2008

• Smart Structures and Systems
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• v.19 no.5
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• pp.567-576
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• 2017

Design of piezoelectric energy harvester for a wide operating frequency range is a challenging problem and is currently being investigated by many researchers. Widening the operating frequency is required, as the energy is harvested from ambient source of vibration which consists of spectrum of frequency. This paper presents a new technique to increase the operating frequency range which is achieved by designing a harvester featured by a propped cantilever beam with variable over hang length. The proposed piezoelectric energy harvester is modeled analytically using Euler Bernoulli beam theory and the effectiveness of the harvester is demonstrated through experimentation. The results from analytical model and from experimentation reveal that the proposed energy harvester generates an open circuit output voltage ranging from 36.43 V to 11.94 V for the frequency range of 27.24 Hz to 48.47 Hz. The proposed harvester produces continuously varying output voltage and power in the broadened operating frequency range.

• Journal of Sensor Science and Technology
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• v.13 no.6
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• pp.417-423
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• 2004

In order to obtain wide-beam characteristics and variable resonant frequency of a ultrasonic transducer for the array source, an electrode of transverse mode piezoelectric vibrator is divided, and an electronic inductance is connected to the divided electrodes. The electronic inductance is made by GIC (General Impedance Converter) circuit. Because the GIC circuit is made of OP-Amps and other passive elements, the value of the inductance can be selected easily. As the results, the electronic inductance is variable in the range from 0.2 mH to 1.2 mH. Using the inductance, the resonance frequency of the transducer can be changed in the range from 73 kHz to 86 kHz. In the directivity of the transducer, it is confirmed that the beam width of the transducer is wider than $80^{\circ}$ at -3 dB in water.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.8
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• pp.717-724
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• 2016

This paper presents design of a 40 GHz CMOS PLL frequency synthesizer for a 60 GHz sliding-IF RF transceiver. For stable locking over a wide bandwith for a injection-locked frequency divider, an inductive-peaking technique is employed so that it ensures the PLL can safely lock across the very wide tuning range of the VCO. Also, Injection-locked type LC-buffer with low-phase noise and low-power consumption is added in between the VCO and ILFD so that it can block any undesirable interaction and performance degradation between VCO and ILFD. The PLL is designed in 65 nm CMOS precess. It covers from 37.9 to 45.3 GHz of the output frequency. and its power consumption is 74 mA from 1.2 V power supply.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.152-156
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• 2013

This paper presents a fast-lock dual-loop successive approximation register-controlled duty-cycle corrector (SARDCC) circuit using a mixed (binary+sequential) search algorithm. A wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy have been achieved by utilizing the dual-loop architecture and the binary search SAR that achieves the fast duty-cycle correcting property. By transforming the binary search SAR into a sequential search counter after the first DCC lock-in, the proposed dual-loop SARDCC keeps the closed-loop characteristic and tracks variations in process, voltage, and temperature (PVT). The measured duty cycle error is less than ${\pm}0.86%$ for a wide input duty-cycle range of 15-85 % over a wide frequency range of 0.5-2.0 GHz. The proposed dual-loop SARDCC is fabricated in a 0.18-${\mu}m$, 1.8-V CMOS process and occupies an active area of $0.075mm^2$.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.2
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• pp.324-328
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• 2012

A recovered jitter of CDR(Clock and Data Recovery) Circuit based on Dual-loop DLL(Delay Locked Loop) for data recovery in high speed serial data communication is changed by depending on the input data and reference clock frequency. In this paper, 2-step DPC which has constant jitter performance for wide-range input frequency is proposed. The designed prototype 2-step CDR using proposed 2-step DPC has operation frequency between 200Mbps and 4Gbps. Average delay step of 2-step DPC is 10ps. Designed CDR circuit was tested with 0.18um CMOS process.

• Journal of Power Electronics
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• v.12 no.6
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• pp.851-858
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• 2012

This paper presents resonant inverter tuning for current source parallel resonant induction heating systems based on a new self oscillating switching technique. The phase error is suppressed in a wide range of operating frequencies in comparison with Phase Locked Loop (PLL) techniques. The proposed switching method has the capability of tuning under fast changes in the resonant frequency. According to this switching method, a multi-frequency induction heating (IH) system is proposed by using a single inverter. In comparison with multi-level inverter based IH systems, the advantages of this technique are its simple structure, better transients and wide range of operating frequencies. A laboratory prototype was built with an operating frequency of 35 kHz to 55 kHz and 300 W of output power. The performance of the IH system shows the validity of the new switching technique.