• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1977-1979
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• 1996

Single-crystaIline silicon diaphgrams and features are fabricated without using an etch stop process. The process involves vertical dry etching, double-sided alignment, followed by wet-chemical etching from the back side. The abvantages of this process are that $5{\sim}50{\mu}m$ diaphgrams and features can be fabricated accurately and inexpensively. In addition, since no impurity-based process is introduced, highly uniform and homogenous properties can be achieved

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 추계학술대회 논문집
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• pp.268-271
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• 2005

Etch resistance of mask layer on silicon substrate modified by AFM-based Tribo-Nanolithography (TNL) in Aqueous Solution in an aqueous solution was demonstrated. n consists or sequential processes, nano-scratching and wet chemical etching. The simple scratching can form a mask layer on the silicon substrate, which acting as an etching mask. For TNL, a specially designed cantilever with diamond tip, allowing the formation of mask layer on silicon substrate easily by a simple scratching process, has been applied instead of conventional silicon cantilever fur scanning. This study demonstrates how the TNL parameters can affect the etch resistance of mask layer, hence introducing a new process of AFM-based maskless nanolithography in aqueous solution.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.27-27
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• 2010

결정성과 전하 이동도가 우수한 CdTe 박막을 증착하기 위하여 근접승화법(CSS), chemical spraying법, 전착(electrodeposition)법, screen printing법, 화학기상증착(MOCVD)법 및 sputtering법등이 응용되고 있으며 이들 방법은 각기 다양한 장단점을 가지고 있다. CdTe 태양전지를 성장시키는 다양한 방법 중에서 본 발표는 CBD를 이용한 CdS와 CSS를 이용한 CdTe 박막 태양전지를 성장하는 방법을 포함한다. 다양한 조건에서 성장된 박막의 물성과 CdCl2와 열처리를 통한 성능개선에 대해 발표할 예정이다. 또한, 공기의 index와 박막의 index 차이가 크기 때문에, escape cone의 angle이 매우 작고, 박막의 경우 표면이 비교적 평평하기 때문에, 광소자(LED와 Solar Cell)는 표편 텍스처링이 성능을 향상시키기 위해 필요하다. Natural Lithography, Wet-etching, Dry-etching, index-grading을 이용하여, LED와 태양전지에서 uniform하고 대면적에 적용가능한 표면 택스처링 방법에 대해 발표할 예정이다.

• Transactions on Electrical and Electronic Materials
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• 제14권6호
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• pp.304-307
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• 2013

Reverse engineering of semiconductor devices utilizes delayering processes, in order to identify how the interconnection lines are stacked over transistor gates. Cu metal has been used in recent fabrication technologies, and de-processes becomes more difficult with the shrinking device dimensions. In this article, reverse engineering technologies to reveal the Cu interconnection lines and Cu via-plugs embedded in dielectric layers are investigated. Stacked dielectric layers are removed by $CF_4$ plasma etching, then the exposed planar Cu metal lines and via-plugs are selectively delineated by wet chemical solution, instead of the commonly used plasma-based dry etch. As a result, we have been successful in extracting the layouts of multiple layers within a system IC, and this technique can be applicable to other logic IC, analog IC, and CMOS IC, etc.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.320-320
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• 2012

III-V 화합물 태양전지는 실리콘, CdTe, CIGS, 염료, 및 유기 등 다른 태양전지에 비해 1sun 상 30% 이상의 고효율을 갖고 있고 앞으로도 계속 증가할 수 있는 가능성을 갖고 있다. 그 이유는 직접천이형 밴드갭, 높은 이동도 등의 고성능 물질특성과 더불어 3족과 5족의 비율을 조절함으로써 같은 결정구조를 갖고 에너지 밴드갭이 다른 물질들을 만들기에 용의하여, 태양전지 스펙트럼의 넓은 영역을 흡수할 수 있는 장점이 있기 때문이다. 그러나, 셀자체의 물질이 실리콘에 비하여 고가이므로, 고성능이 요구되는 우주 인공위성등에 적용이 되었지만, 2000년대 이후로 집광에 적용가능한 태양전지의 연구를 거듭하여 2005년부터는 값싼 프레넬 렌즈를 이용하여 1sun에 비해 500배 해당하는 빛을 셀에 집광하여 보다 효율을 증가시킴으로써 지상발전용에도 적용가능한 셀을 형성하게 되었다. 더불어 태양전지의 효율을 증가시키기 위한 개선된 구조적 변화의 시도도 많이 이루어지고 있다. 최근 보고에 의하면 실리콘 태양전지의 표면에 texture 또는 나노 구조를 주어 높은 흡수율과 낮은 반사율을 갖게 함으로써 효율을 증가시키는 사례가 많아지고, III-V 화합물 태양전지도 texturing에 의해 증가된 효율을 발표한바 있다. 본 연구에서는 태양전지의 효율을 증가시키기 위하여 III-V 화합물 태양전지 표면에 micro-hole array texture 구조를 형성한 후 나노 particle을 이용한 나노 texture 구조를 형성하였다. Photo-lithography와 chemical wet etching으로 micro-hole array texture 구조를 형성하였으며 micro-hole의 직경은 $5{\sim}20{\mu}m$, hole과 hole의 간격은 $3{\sim}15{\mu}m$로 다양하게 변화를 주었다. 형성된 micro-hole array texture 구조위에 수십 nm 크기의 particle을 만들어 chemical wet etching으로 나노 texture 구조를 형성하였다. 태양전지 표면에 texture 구조가 있는 경우와 없는 경우에 각각 효율을 측정, 비교 분석하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.86.1-86.1
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• 2015

As the feature size of Si-based semiconductor shrinks to nanometer scale, we are facing to the problems such as short channel effect and leakage current. One of the solutions to cope with those issues is to bring III-V compound semiconductors to the semiconductor structures, because III-V compound semiconductors have much higher carrier mobility than Si. However, introduction of III-V semiconductors to the current Si-based manufacturing process requires great challenge in the development of process integration, since they exhibit totally different physical and chemical properties from Si. For example, epitaxial growth, surface preparation and wet etching of III-V semiconductors have to be optimized for production. In addition, oxidation mechanisms of III-V semiconductors should be elucidated and re-growth of native oxide should be controlled. In this study, surface preparation methods of various III-V compound semiconductors such as GaAs, InAs, and GaSb are introduced in terms of i) how their surfaces are modified after different chemical treatments, ii) how they will be re-oxidized after chemical treatments, and iii) is there any effect of surface orientation on the surface preparation and re-growth of oxide. Surface termination and behaviors on those semiconductors were observed by MIR-FTIR, XPS, ellipsometer, and contact angle measurements. In addition, photoresist stripping process on III-V semiconductor is also studied, because there is a chance that a conventional photoresist stripping process can attack III-V semiconductor surfaces. Based on the Hansen theory various organic solvents such as 1-methyl-2-pyrrolydone, dimethyl sulfoxide, benzyl alcohol, and propylene carbonate, were selected to remove photoresists with and without ion implantation. Although SPM and DIO3 caused etching and/or surface roughening of III-V semiconductor surface, organic solvents could remove I-line photoresist without attack of III-V semiconductor surface. The behavior of photoresist removal depends on the solvent temperature and ion implantation dose.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권2호
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• pp.121-127
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• 2008

This paper presents design and fabrication of optimized geometry structure of electrostatic inkjet head. In order to verify effect of geometry shape, we simulate electric field intensity according to the head structure. The electric field strength increases linearly with increasing height of the micro nozzle. As the nozzle diameter decreases, the electric field along the periphery of the meniscus can be more concentrated. We design and fabricate the electrostatic inkjet heads, hole type and pole type, with optimized structure. It was fabricated using thick-thermal oxidation and silicon micromachining technique such as the deep reactive ion etching (DRIE) and chemical wet etching process. It is verified experimentally that the use of the MEMS inkjet head allows a stable and sustainable micro-dripping mode of droplet ejection. A stable micro dripping mode of ejection is observed under the voltages 2.5 kV and droplet diameter is $10\;{\mu}m$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 춘계학술대회 논문집 센서 박막재료 반도체재료 기술교육
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• pp.62-65
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• 2002

Transparent conducting aluminum-doped Zinc oxide films (ZnO:Al) were prepared by rf magnetron sputtering on glass (Coming 1737) substrate as a variation of the deposition condition. After deposition, the smooth ZnO:Al films were etched in diluted HCl (0.5%) to examine the electrical and surface morphology properties as a variation of the time. The most important deposition condition of surface-textured ZnO films by chemical etching is the processing pressure and the substrate temperature. In low pressures (0.9mTorr) and high substrate temperatures $({\leq}300^{\circ}C)$, the surface morphology of films exhibits a more dense and compact film structure with effective light-trapping to apply the silicon thin film solar cells.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 C
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• pp.1482-1484
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• 2002

Transparent conductive oxides (TCO) are necessary as front electrode for most thin film solar cell. In our paper, transparent conducting aluminum-doped Zinc oxide films (ZnO:Al) were prepared by rf magnetron sputtering on glass (Corning 1737) substrate as a variation of the deposition condition. After deposition, the smooth ZnO:Al films were etched in diluted HCI (0.5%) to examine the electrical and surface morphology properties as a variation of the time. The most important deposition condition of surface-textured ZnO films by chemical etching is the processing pressure and the substrate temperature. In low pressures (0.9mTorr) and high substrate temperatures $({\leq}300^{\circ}C)$, the surface morphology of films exhibits a more dense and compact film structure with effective light-trapping to apply the silicon thin film solar cells.

• 한국결정성장학회지
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• 제10권4호
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• pp.309-317
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• 2000

Langasite is a promising new piezoelectric material for SAW filter application. Little was known until recently about the methods needed to mechanically polish and chemically polish/etch this material. In this experiment, polishing, slurry chemistry and chemical wet etching for langasite is described. Conventional quartz and LN ($LiNbO_3$) polishing methods did not produce satisfactory polished surfaces, and polishing with a colloidal silica slurries has shown to be most effective. The optimum condition was investigated by changing the slurry chemistry. As the planarization effect is very important in SAW filter applications, the examination of the effective particle number effect and the particle size effect was carried out. Z-cut langasite surface which had been polished with the colloidal silica slurries was etched in a variety of etchants. Conventional quartz etchants destroyed the polished surface. Other etchants formed a thin film on the surfaces. In this experiment, the reaction between langasite and a few etching solution was analysed. And an appropriate selective etchant solution for analyzing the defects was synthesized.