• Title/Summary/Keyword: wet-chemical etching

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Study on dielectric function of natural ZnSe oxide by spectroscopic ellipsomety (분광타원법을 이용한 ZnSe 자연 산화막의 유전율 함수에 관한 연구)

  • 김태중;성가영;최재규;김영동
    • Journal of the Korean Vacuum Society
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    • v.10 no.2
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    • pp.252-256
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    • 2001
  • We performed spectroscopic ellipsometry measurement to obtain dielectric function(DF) of ZnSe at room temperature. Proper wet chemical etching procedure was carried out to remove overlayers on top of ZnSe, and our result indicates that the previous reports on the pure DF of ZnSe have inaccurate interpretations. We constructed DF of oxide on ZnSe by using reported DFs of amorphous-Se, $GaAsO_3$, and voids through Bruggeman effective-medium approximation.

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A New Poly-Si TFT Employing Air-Cavities at the Edge of Gate Oxide (게이트 산화막 가장자리에 Air-cavity를 가지는 새로운 구조의 다결정 실리콘 박막 트랜지스터)

  • Lee, Min-Cheol;Jung, Sang-Hoon;Song, In-Hyuk;Han, Min-Koo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.8
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    • pp.365-370
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    • 2001
  • We have proposed and fabricated a new poly-Si TFT employing air-cavities at the edges of gate oxide in order to reduce the vertical electric field induced near the drain due to low dielectric constant of air. Air-cavity has been successfully fabricated by employing the wet etching of gate oxide and APCVD (Atmospheric pressure chemical vapor deposition) oxide deposition. Our experimental results show that the leakage current of the proposed TFT is considerably reduced by the factor of 10 and threshold voltage shift under high gate bias is also reduced because the carrier injection into gate insulator over the drain depletion region is suppressed.

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Fabrication & Properties of Field Emitter Arrays using the Mold Method for FED Application (Mold 법에 의해 제작된 FED용 전계에미터어레이의 특성 분석)

  • ;;;;K. Oura
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.347-350
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    • 2001
  • A typical Mold method is to form a gate electrode, a gate oxide, and emitter tip after fabrication of mold shape using wet-etching of Si substrate. In this study, however, new Mold method using a side wall space structure is used in order to make sharper emitter tip with a gate electrode. Using LPCVD(low pressure chemical vapor deposition), a gate oxide and electrode layer are formed on a Si substrate, and then BPSG(Boro phospher silicate glass) thin film is deposited. After, the BPSG thin film is flowed into a mold as high temperature in order to form a sharp mold structure. Next TiN thin film is deposited as a emitter tip substance. The unfinished device with a glass substrate is bonded by anodic bonding techniques to transfer the emitters to a glass substrate, and Si substrate is etched using KOH-deionized water solution. Finally, we made sharp field emitter array with gate electrode on the glass substrate.

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The Effect of Hydrogen Plasma on Surface Roughness and Activation in SOI Wafer Fabrication

  • Park, Woo-Beom;Kang, Ho-Cheol;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.1 no.1
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    • pp.6-11
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    • 2000
  • The hydrogen plasma treatment of silicon wafers in the reactive ion-etching mode was studied for the application to silicon-on-insulator wafers which were prepared using the wafer bonding technique. The chemical reactions of hydrogen plasma with surface were used for both surface activation and removal of surface contaminants. As a result of exposure of silicon wafers to the plasma, an active oxide layer was found on the surface. This layer was rendered hydrophilic. The surface roughness and morphology were examined as functions of the plasma exposing time and power. In addition, the surface became smoother with the shorter plasma exposing time and power. The value of initial surface energy estimated by the crack propagation method was 506 mJ/㎡, which was up to about three times higher as compared to the case of conventional direct using the wet RCA cleaning method.

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Characteristics of spiral type thin film inductors for the frequency (나선형 박막 인덕터의 주파수 특성)

  • Park, Dae-Jin;Min, Bok-Ki;Kim, In-Sung;Song, Jae-Sung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07b
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    • pp.890-893
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    • 2004
  • In this study, Spiral inductors on the $SiO_2/Si$(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of 2 ${\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to 60${\mu}m$ and from 20 to 70 ${\mu}m$, respectively. Inductance and Q factor dependent on the frequency were investigated to analyze performance of spiral inductors.

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Development of Active Matrix Cathodes Composed of a-Si:H TFTs and Gated Molybdenum Field Emitter Arrays

  • Chung, Choong-Heui;Song, Yoon-Ho;Hwang, Chi-Sun;Ahn, Seong-Deok;Kim, Bong-Chul;Cho, Young-Rae;Lee, Jin-Ho;Cho, Kyoung-Ik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.1020-1023
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    • 2002
  • We successfully developed a-Si TFT controlled active matrix cathode (AMC) with gated Mo emitters. Also, we could remove emitter failures of the AMC through a novel surface treatment of Mo-tips, which indicates reduction of $MoO_3$ or chemical wet etching of $MoO_3$ by surface treatment. Transient behaviors of the AMC are strongly dependent on not only DC characteristics of device but also the device structure. Brightness and gray scale were well realized by low-voltage scan and data signals addressed to a-Si TFTs.

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The Development of Optical Temperature Sensor Based on the Etched Bragg Gratings

  • Ahn, Kook-Chan;Lee, Sang-Mae
    • International Journal of Aeronautical and Space Sciences
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    • v.2 no.2
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    • pp.56-64
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    • 2001
  • An optical temperature sensor based on the etched planar waveguide Bragg grating is developed and its performance is explored using theoretical and experimental methods. The planar waveguide is designed and fabricated using optical lithography and wet chemical etching. An efficient butt coupled optical fiber is used to examine the spectral characteristics of the grating sensor, and to investigate the grating parameters. The typical bandwidth and reflectivity of the surface etched grating has been ~0.2 nm and ~7%, respectively, at a wavelength of ~1,552 nm. The temperature-induced wavelength change of the optical sensor is found to be slightly non-linear over ${\sim}200^{\circ}C$ temperature range. Theoretical models for the grating response of the sensor based on waveguide and classical laminated plate deformation theories agree with experiments to within acceptable tolerance.

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A Study on Temperature Compensation of Silicon Piezoresistive Pressure Sensor (실리콘 저항형 압력센서의 온도 보상에 관한 연구)

  • 최시영;박상준;김우정;정광화;김국진
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.4
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    • pp.563-570
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    • 1990
  • A silicon pressure sensor made of a full bridge of diffused resistors was designed and fabricated using semiconductor integrated circuit process. Thin diaphragms with 30\ulcorner thickness were obtained using anisotropic wet chemical etching technique. Our device showed strong temperature dependence. Compensation networks are used to compensate for the temperature dependence of the pressure sensor. The bridge supply voltage having positive temperature coefficient by compensation networks was utilized against the negative temperature coefficient of bridge output voltage. The sensitivity fluctuation of pressure sensor before temperature compensation was -1700 ppm/\ulcorner, while it reduced to -710ppm\ulcorner with temperature compensation. Our result shows that the we could develop accurate and reliable pressure sensor over a wide temperature range(-20\ulcorner~50\ulcorner).

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Fabrication of $1{\mu}$ m Gate GaAs MESFET and Analysis of Correlation Between DC Characteristics and Channel Parameters ($1{\mu}$ 게이트 GaAs MESFET의 제조 및 DC 특성과 채널 파라미터들 사이의 상호관게 분석)

  • 엄경숙;이유종;강광남
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.5
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    • pp.804-812
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    • 1987
  • 1\ulcorner gate MESFETs are fabricated on MOCVD and VPE grown GaAs wafers using photolithography, chemical wet etching and lift-off techniques. DC characteristics such as Vt, Gm, Rs, etc. are studied and active channel parameters of MESFET(a, n, Leff, \ulcorner)are analyzed for 1-4 \ulcorner gate FETs and 100\ulcorner FAT FET. The correlation between DC data and active channel parameters are experimentally analyzed. The measured transconductance and low-field mobility in the active channel for the 1\ulcorner gate MESFET made on MOCVD wafer are 67mS/mm and 2980cm\ulcornerVs respectively.

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Fabrication of low-stress silicon nitride film for application to biochemical sensor array

  • Sohn, Young-Soo
    • Journal of Sensor Science and Technology
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    • v.14 no.5
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    • pp.357-361
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    • 2005
  • Low-stress silicon nitride (LSN) thin films with embedded metal line have been developed as free standing structures to keep microspheres in proper locations and localized heat source for application to a chip-based sensor array for the simultaneous and near-real-time detection of multiple analytes in solution. The LSN film has been utilized as a structural material as well as a hard mask layer for wet anisotropic etching of silicon. The LSN was deposited by LPCVD (Low Pressure Chemical Vapor Deposition) process by varing the ratio of source gas flows. The residual stress of the LSN film was measured by laser curvature method. The residual stress of the LSN film is 6 times lower than that of the stoichiometric silicon nitride film. The test results showed that not only the LSN film but also the stack of LSN layers with embedded metal line could stand without notable deflection.