• Title/Summary/Keyword: wet etching process

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Characteristics of $SiN_x$ films on wet-etched Si for field emission device (전계 방출 소자용으로 제조한 단결정 실리콘 기판에 증착된 실리콘 질화막에 대한 특성 연구)

  • Jung, Jae-Hoon;Ju, Byeong-Kwon;Lee, Yun-Hi;Oh, Myung-Hwan;Jang, Jin
    • Proceedings of the KIEE Conference
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    • 1995.07c
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    • pp.1137-1139
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    • 1995
  • $SiN_x$ films deposited on bare Si and wet-etched Si by RPCVD were fabricated to investigated the effect of wet-etched surface of Si on the characteristics of the interface between $SiN_x$ and Si. FT-IR spectra on each film showed similar characteristics. However, it was confirmed that the electric characteristics(I-V, C-V) of the interface between $SiN_x$ and Si have been degraded by the wet etching process of Si, which is applied for the formation of Si field emitter array. Therefore, we suggest that the stacked structure of insulating layer with good interface characteristics is desirable for FED application.

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Fabrication of Microstrip Band-Pass Filter using HTS Thin Film (고온초전도 박막을 이용한 마이크로스트립 대역통과 필터의 제작)

  • 허원일;정동철;김민기;임성훈;한병성
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1996.11a
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    • pp.389-392
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    • 1996
  • The recent development of high temperature superconducting epitaxial thin film offer great potential for planar passive microwave application such as ring resonator, filters, transmission lines, and antennas. This paper describes the fundamental properties of Microstrip Band-Pass Filter using HTS Thin Film and its application to microwave devices. In order to fabricate HTS microstrip multiple filters, We have grown laser ablated HTS thin films, patterned by photolithographic process and wet etching processes intro HTS microwave devices.

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Wet Etching of Stainless Steel Foil by Aqueous Ferric Chloride Solution (염화제이철 수용액에 의한 스테인레스 강판의 식각에 관한 연구)

  • Lee, Hyung Min;Park, Mooryong;Park, Gwang Ho;Park, Chinho
    • Korean Chemical Engineering Research
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    • v.50 no.2
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    • pp.211-216
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    • 2012
  • Wet chemical etching of stainless steel foil by aqueous ferric chloride solution was investigated in this study. Effects of various process parameters (e.g. etchant agitation rate, etchant temperature, $Fe^{3+}$ ion concentration, free HCl concentration, specific gravity, etc.) on the etch rate was first studied, and it was found that the etch rate of AK (aluminum-killed) steel, chromium metal and stainless steel (STS430J1L alloy) follows the pseudo-first order reaction equation. When the fatigue ratio of etchant was kept under 16%, sludge was not formed in the solution, and the etched surface showed smooth roughness. The etch rate decreases as Baume of etchant increases, but the effect of free HCl concentration on the etch rate turned out to be minimal. Experimental data were compared with the calculated results from modeled equation, showing very good agreement.

Atmospheric Pressure Plasma Etching Technology for Forming Circular Holes in Perovskite Semiconductor Materials (페로브스카이트 반도체 물질에 원형 패턴을 형성하기 위한 상압플라즈마 식각 기술)

  • Kim, Moojin
    • Journal of Convergence for Information Technology
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    • v.11 no.2
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    • pp.10-15
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    • 2021
  • In this paper, we formed perovskite (CH3NH3PbI3) thin films on glass with wet coating methods, and used various analytical techniques to discuss film thickness, surface roughness, crystallinity, composition, and optical property. The coated semiconductor material has no defects and is uniform, the surface roughness value is very small, and a high absorption rate has been observed in the visible light area. Next, in order to implement the hole shape in the organic-inorganic layer, Samples in the order of a metal mask with holes at regular intervals, a glass coated with a perovskite material, and a magnet were etched with atmospheric pressure plasma equipment. The shape of the hole formed in the perovskite material was analyzed by changing the time. It can be seen that more etching is performed as the time increases. The sample with the longest processing time was examined in more detail, and it was classified into 7 regions by the difference according to the location of the plasma.

A Study on the microcooling Fin Fabrication Process for Enhancing Boiling Heat Transfer (비등열전달 향상을 위한 초소형 핀 제작공정에 관한 연구)

  • You, Sam-Sang;Lim, Tae-Woo;Jeong, Seok-Kwon;Park, Jong-Un
    • Journal of Fisheries and Marine Sciences Education
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    • v.19 no.3
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    • pp.366-372
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    • 2007
  • This paper presents the fabrication techniques of microcooling fins for microelectronics applications. The various types of cooling fins have been fabricated on the surface of a silicon wafer (4inch-N type) by using wet etching technique. The designed micro fins and micro channels are considered as an effective method for cooling microelectronics devices generating high heat flux. Further we extensively investigate the design processes fabricating micro fins and channels which can cool the heat generated from high density electronics devices.

A Study on Fabrication of Piezorresistive Pressure Sensor (벌크 마이크로 머쉬닝에 의한 다결정 실리콘 압력센서 제작 관한 연구)

  • 임재홍;박용욱;윤석진;정형진;윤영수
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.677-680
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    • 1999
  • Rapid developing automation technology enhances the need of sensors. Among many materials, silicon has the advantages of electrical and mechanical property, Single-crystalline silicon has different piezoresistivity on 야fferent directions and a current leakage at elevated temperature, but poly-crystalline silicon has the possibility of controling resistivity using dopping ions, and operation at high temperature, which is grown on insulating layers. Each wafer has slightly different thicknesses that make difficult to obtain the precisely same thickness of a diaphragm. This paper deals with the fabrication process to make poly-crystalline silicon based pressure sensors which includes diaphragm thickness and wet-etching techniques for each layer. Diaphragms of the same thickness can be fabricated consisting of deposited layers by silicon bulk etching. HF etches silicon nitride, HNO$_3$+HF does poly -crystalline silicon at room temperature very fast. Whereas ethylenediamice based etchant is used to etch silicon at 11$0^{\circ}C$ slowly.

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Fabrication of plastic CE (capillary electrophoresis) microchip by hot embossing process (핫 엠보싱 공정을 이용한 플라스틱 CE(capillary electrophoresis) 마이크로 칩의 제작)

  • Cha Nam-Goo;Park Chang-Hwa;Lim Hyun-Woo;Park Jin-Goo
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.1140-1144
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    • 2005
  • A plastic-based CE (capillary electrophoresis) microchip was fabricated by hot embossing process. A Si mold was made by wet etching process and a PMMA wafer was cut off from 1mm thick PMMA sheet. A micro-channel structure on PMMA substrate was produced by hot embossing process using the Si mold and the PMMA wafer. A vacuum assisted thermal bonding procedure was employed to seal an imprinted PMMA wafer and a blank PMMA wafer. The results of microscopic cross sectional images showed dimensions of channels were well preserved during thermal bonding process. In our procedure, the deformation amount of bonding process was below 1%. The entire fabrication process may be very useful for plastic based microchip systems.

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Development of a Hot-Embossing Process using Ceramic Glass Molds for Polymer Micro Structures (글라스 주형을 이용한 폴리머 미세 형상 핫-엠보싱 공정 연구)

  • Kim, Joo-Han;Shin, Ki-Hoon
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.16 no.6
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    • pp.168-174
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    • 2007
  • A ceramic glass mold was developed for micro hot-embossing and replicated polymer parts are fabricated. The glass-ceramic micro mold could be fabricated with a laser process and a wet etching process and the fabrication time could be saved a lot. Various polymer micro structures can be obtained by hot-embossing. The process parameters such as ho-embossing temperatures or pressures were investigated and optimized. This process can be applied for fabrication of micro structures for flip-chips or micro fluidic channels for bio-engineering. The advantages and disadvantages of this process are discussed, too.

Surface Preparation of III-V Semiconductors

  • Im, Sang-U
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.86.1-86.1
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    • 2015
  • As the feature size of Si-based semiconductor shrinks to nanometer scale, we are facing to the problems such as short channel effect and leakage current. One of the solutions to cope with those issues is to bring III-V compound semiconductors to the semiconductor structures, because III-V compound semiconductors have much higher carrier mobility than Si. However, introduction of III-V semiconductors to the current Si-based manufacturing process requires great challenge in the development of process integration, since they exhibit totally different physical and chemical properties from Si. For example, epitaxial growth, surface preparation and wet etching of III-V semiconductors have to be optimized for production. In addition, oxidation mechanisms of III-V semiconductors should be elucidated and re-growth of native oxide should be controlled. In this study, surface preparation methods of various III-V compound semiconductors such as GaAs, InAs, and GaSb are introduced in terms of i) how their surfaces are modified after different chemical treatments, ii) how they will be re-oxidized after chemical treatments, and iii) is there any effect of surface orientation on the surface preparation and re-growth of oxide. Surface termination and behaviors on those semiconductors were observed by MIR-FTIR, XPS, ellipsometer, and contact angle measurements. In addition, photoresist stripping process on III-V semiconductor is also studied, because there is a chance that a conventional photoresist stripping process can attack III-V semiconductor surfaces. Based on the Hansen theory various organic solvents such as 1-methyl-2-pyrrolydone, dimethyl sulfoxide, benzyl alcohol, and propylene carbonate, were selected to remove photoresists with and without ion implantation. Although SPM and DIO3 caused etching and/or surface roughening of III-V semiconductor surface, organic solvents could remove I-line photoresist without attack of III-V semiconductor surface. The behavior of photoresist removal depends on the solvent temperature and ion implantation dose.

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Influence of Inverted Pyramidal Surface on Crystalline Silicon Solar Cells (결정질 실리콘 태양전지 표면 역 피라미드 구조의 특성 분석)

  • Yang, Jeewoong;Bae, Soohyun;Park, Se Jin;Hyun, Ji Yeon;Kang, Yoonmook;Lee, Hae-Seok;Kim, Donghwan
    • Current Photovoltaic Research
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    • v.6 no.3
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    • pp.86-90
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    • 2018
  • To generate more current in crystalline silicon solar cells, surface texturing is adopted by reducing the surface reflection. Conventionally, random pyramid texturing by the wet chemical process is used for surface texturing in crystalline silicon solar cell. To achieve higher efficiency of solar cells, well ordered inverted pyramid texturing was introduced. Although its complicated process, superior properties such as lower reflectance and recombination velocity can be achieved by optimizing the process. In this study, we investigated optical and passivation properties of inverted pyramid texture. Lifetime, implied-Voc and reflectance were measured with different width and size of the texture. Also, effects of chemical rounding at the valley of the pyramid were observed.