• Clean Technology
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• v.29 no.4
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• pp.255-261
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• 2023

Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.29 no.3
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• pp.310-321
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• 2019

Objectives: The purpose of this study was to investigate types and characteristics of chemical substances used in LCD(Liquid crystal display) panel manufacturing process. Methods: The LCD panel manufacturing process is divided into the fabrication(fab) process and module process. The use of chemical substances by process was investigated at four fab processes and two module processes at two domestic TFT-LCD(Thin film transistor-Liquid crystal display) panel manufacturing sites. Results: LCD panels are manufactured through various unit processes such as sputtering, chemical vapor deposition(CVD), etching, and photolithography, and a range of chemicals are used in each process. Metal target materials including copper, aluminum, and indium tin oxide are used in the sputtering process, and gaseous materials such as phosphine, silane, and chlorine are used in CVD and dry etching processes. Inorganic acids such as hydrofluoric acid, nitric acid and sulfuric acid are used in wet etching process, and photoresist and developer are used in photolithography process. Chemical substances for the alignment of liquid crystal, such as polyimides, liquid crystals, and sealants are used in a liquid crystal process. Adhesives and hardeners for adhesion of driver IC and printed circuit board(PCB) to the LCD panel are used in the module process. Conclusions: LCD panels are produced through dozens of unit processes using various types of chemical substances in clean room facilities. Hazardous substances such as organic solvents, reactive gases, irritants, and toxic substances are used in the manufacturing processes, but periodic workplace monitoring applies only to certain chemical substances by law. Therefore, efforts should be made to minimize worker exposure to chemical substances used in LCD panel manufacturing process.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.65-65
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• 1999

Dry etching technique provides more easy controllability on the etch profile such as anisotropic etching than wet etching process and the results of lots of researches on the characterization of various plasmas or ion beams for semiconductor etching have been reported. Chlorine-based plasmas or chlorine ion beam have been often used to etch several semiconductor materials, in particular Si-based materials. We have studied the effect of He flow rate on the Si and SiO2 dry etching using chlorine-based plasma. Experiments were performed using reactive ion etching system. RF power was 300W. Cl2 gas flow rate was fixed at 58.6 sccm, and the He flow rate was varied from 0 to 120 sccm. Fig. 1 presents the etch depth of si layer versus the etching time at various He flow rate. In case of low He flow rate, the etch rate was measured to be negligible for both Si and SiO2. As the He flow increases over 30% of the total inlet gas flow, the plasma state becomes stable and the etch rate starts to increase. In high Ge flow rate (over 60%), the relation between the etch depth and the time was observed to be nearly linear. Fig. 2 presents the variation of the etch rate depending on the He flow rate. The etch rate increases linearly with He flow rate. The results of this preliminary study show that Cl2/He mixture plasma is good candidate for the controllable si dry etching.

• Korean Journal of Materials Research
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• v.23 no.6
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• pp.322-328
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• 2013

The relationship the between electrical properties and surface roughness (Ra) of a wet-etched silicon wafer were studied. Ra was measured by an alpha-step process and atomic force microscopy (AFM) while varying the measuring range $10{\times}10$, $40{\times}40$, and $1000{\times}1000{\mu}m$. The resistivity was measured by assessing the surface resistance using a four-point probe method. The relationship between the resistivity and Ra was explained in terms of the surface roughness. The minimum error value between the experimental and theoretical resistivities was 4.23% when the Ra was in a range of $10{\times}10{\mu}m$ according to AFM measurement. The maximum error value was 14.09% when the Ra was in a range of $40{\times}40{\mu}m$ according to AFM measurement. Thus, the resistivity could be estimated when the Ra was in a narrow range.

• 한국신재생에너지학회:학술대회논문집
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• 2009.11a
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• pp.349-349
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• 2009

High quality ZnO:Al films were prepared on glass substrates by in-line RF magnetron sputtering and their surface morphologies were modified by wet-etching process in dilute acid solution to improve optical properties for application to silicon thin film solar cells as front electrode. The as-deposited films show a strong preferred orientation in [001] direction under our experimental conditions. A low resistivity below $5{\times}10^{-4}{\Omega}{\cdot}cm$ and high optical transmittance above 80% in a visible range are achieved in the films deposited at optimized conditions. After wet-etching, the surface morphologies of the films are changed dramatically depending on the deposition conditions, especially working pressure. The optical properties such as total/diffuse transmittance, haze and angular resolved distribution of light are varied significantly with the surface morphology feature, whereas the electrical properties are seldom changed. The cell performances of silicon thin film solar cells fabricated on the textured films are also evaluated in detail with comparison of commercial $SnO_2$:F films.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.1522-1526
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• 2005

In this study, the fabrication of large area silicon mirror is accomplished by anisotropic etching using MEMS for implementation of integrated optical pickup and the process condition is also established for improving the mirror surface roughness. Until now, few results have been reported about the production of highly stepped $9.74^{\circ}$ off-axis-cut silicon wafer using wet etching. In addition rough surface of the mirror is achieved in case of long etching time. Hence a novel method called magnetorheolocal finishing is introduced to enhancing the surface quality of the mirror plane. Finally, areal peak to valley surface roughness of mirror plane is reduced about 100nm in large area of $mm^2$ and it is applicable to optical pickup using infrared wavelength.

• Transactions of the Society of Information Storage Systems
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• v.1 no.2
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• pp.182-187
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• 2005

A large area micro mirror is an optical element that functions as changing an optical path by reflection in integrated optical system. We fabricated the large area silicon mirror by anisotropic etching using MEMS for implementation of integrated optical pickup. In this work, we report the optimum conditions to better fabricate and design, greatly improve mirror surface quality. To obtain mirror surface of $45^{\circ},\;9.74^{\circ}$ off-axis silicon wafer from (100) plane was used in etching condition of $80^{\circ}C$ with 40wt.% KOH solution. After wet etching, polishing process by MR fluid was applied to mirror surface for reduction of roughness. In the next step, after polymer coating on the polished Si wafer, the Si mirror was fabricated by UV curing using a trapezoid bar-type way structure. Finally, we obtained peak to valley roughness about 50 nm in large area of $mm^2$ and it is applicable to optical pickup using blu-ray wavelength as well as infrared wavelength.

• Journal of Sensor Science and Technology
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• v.9 no.3
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• pp.224-232
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• 2000

Aluminum metal process in surface micromachining enables to fabricate Al electrodes or Al structures, which improve electrical characteristics by reducing contact- and line-resistance or makes the whole process to be simple by using oxide as sacrificial layer. However, it is not possible to use conventional sacrificial layer etching process, because HF solution attacks aluminum as well as sacrificial oxide. The mixed solution of BHF and glycerine as an alternative shows the adequate properties to meet with this end. The exact etching properties, however, are sensitively depends on the geometry of the released structure, because the most etching process of sacrificial layer proceeds to the lateral direction in narrow space. Also, the surface roughness of aluminum affects to the etching characteristics. This paper reports experimental results on the effect of microstructure and surface roughness of aluminum to the etching properties. Considering these effects, we propose the optimized etching condition, which can be used practically for the fabrication of aluminum electrodes and microstructures by using standard surface micromachining process without modification or additional process.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.11
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• pp.902-909
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• 1991

A reproducible selective dry etch process of GaAs/AlGaAs Heterostructures for High Electron Mobility Transistor(HEMT) Device fabrication is developed. Using RIE mode with $CCl_{2}F_{2}$ as the basic process gas, the observed etch selectivity of GaAs layer with respect to GaAs/$Al_{0.3}Ga_{0.7}$As is about 610:1. Severe polymer deposition problem, parialy generated from the use of $CCl_{2}F_{2}$ gas only, has been significantly reduced by adding a small amount of He gas or by $O_{2}$ plasma ashing after etch process. In order to obtain an optimized etch process for HEMT device fabrication, we com pared the properties of the wet etched Schottky contact with those of the dry etched one, and set dry etch condition to approach the characteristics of Schottky diode on wet etched surface. By applying the optimized etch process, the fabricated HEMT devices have the maximum transconductance $g_{mext}$ of 224 mS/mm, and have relatively uniform distribution across the 2inch wafer in the value of 200$\pm$20mS/mm.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1038-1041
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• 2003

In the paper, we investigated silicon surface microstructures formed by reactive ion etching in hollow cathode system. Wet anisotropic chemical etching technique use to form random pyramidal structure on <100> silicon wafers usually is not effective in texturing of low-cost multicrystalline silicon wafers because of random orientation nature, but High density hollow cathode plasma system illustrates high deposition rate, better film crystal structure, improved etching characteristics. The etched silicon surface is covered by columnar microstructures with diameters form 50 to 100nm and depth of about 500nm. We used $SF_{6}$ and $O_{2}$ gases in HCP dry etch process. This paper demonstrates very high plasma density of $2{\times}10^{12}$ $cm^{-3}$ at a discharge current of 20 mA. Silicon etch rate of 1.3 ${\mu}s/min$. was achieved with $SF_{6}/O_{2}$ plasma conditions of total gas pressure=50 mTorr, gas flow rate=40 sccm, and rf power=200 W. Our experimental results can be used in various display systems such as thin film growth and etching for TFT-LCDs, emitter tip formations for FEDs, and bright plasma discharge for PDP applications. In this paper we directed our study to the silicon etching properties such as high etching rate, large area uniformity, low power with the high density plasma.