• Title/Summary/Keyword: wet etching process

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Wet etching charicteristics of InP in InP/InGaAs HBTs and their fabrication (InP의 습식식각특성과 InP/lnGaAs HBT의 제작)

  • 김강대;박재홍;김용규;황성범;송정근
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.77-80
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    • 2002
  • In this paper, InP-based HBTs have been optimally designed by numerical simulation and fabricated by the self-aligned process. The structure of HBT was designed in terms of the current gain*f$_{max}$ for the base and f$_{T}$*f$_{max}$ for the collector. The designed structure produced the current gain of about 50 and the cutoff frequency and the maximum oscillation frequency of 87GHz and 2940Hz respectively. In addition, we present a study of the vertical and lateral etching of InP with the mask sides parallel to the principal crystallographic axes, [0101 and (001). This etching characteristics arc used to fabricate self-aligned HBT structures with reduced parasitic effects.s.s.s.

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Transparent Conductive Oxides for Display Applications

  • Szyszka, B.;Ruske, F.;Sittinger, V.;Pflug, A.;Werner, W.;Jacobs, C.;Kaiser, A.;Ulrich, S.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.181-185
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    • 2007
  • We report on our material and process research on ZnO:Al films and on our investigations on wet chemical etching using a variety of etching solutions. We achieve resistivity as low as $750{\mu}{\Omega}cm$ for ZnO:Al films with film thickness of 140 nm. Etching with phosphorous acid allows for accurate fine patterning of the ZnO:Al films on glass substrates.

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Device Characteristics of GaN MESFET with the maximum frequency of 10 GHz (최대추파 10 GHz GaN MESFET의 소자특성)

  • 이원상;정기웅;문동찬;신무환
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.497-500
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    • 1999
  • This paper reports on the fabrication and characteristics of recessed gate GaN MESFETs fabricated using a photoelectrochemical wet etching method. The unique etching process utilizes photo-resistive mask and KOH based etchant. GaN MESFETs with successfully recessed gate structure was characterized in terms of dc and RF performance. The fabricated GaN MESFET exhibits a current saturation at $V_{DS}$ = 4 V and a pinch-off at $V_{GS}$ =-3V The peak drain current of the device is about 230mA/mm at 300 K and the value is remained almost same for 500K operation. The $f_{T}$ and $f_{max}$ from the device are 6.357Hz and 10.25 GHz, respectively.y.y.

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Laser-Induced Thermochemical Wet Etching of Mn-Zn Ferrite (Mn-Zn 페라이트의 레이저 유도 열화학 습식식각)

  • Lee, Kyoung-Cheoul;Lee, Cheon
    • Electrical & Electronic Materials
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    • v.10 no.7
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    • pp.668-673
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    • 1997
  • A Single-crystalline Mn-Zn Ferrite (110 orientation) was masklessly etched by focused Ar laser irradiation in an H$_3$PO$_4$ solution. The depth of the etched grooves increases with increasing a laser power, decreasing a scan speed, and increasing the H$_3$PO$_4$concentration. The width of the etched grooves increases with a increasing laser power, but was relatively insensitive to the scan speed and H$_3$PO$_4$concentration. High etching rate of up to 714 ${\mu}{\textrm}{m}$/s and an aspect ratio of 6 for vertical slab structure have been obtained by the light-guiding effect of the laser bean in the H$_3$PO$_4$ solution.

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미세금형 가공을 위한 전기화학식각공정의 유한요소 해석 및 실험 결과 비교

  • Ryu, Heon-Yeol;Im, Hyeon-Seung;Jo, Si-Hyeong;Hwang, Byeong-Jun;Lee, Seong-Ho;Park, Jin-Gu
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2012.05a
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    • pp.81.2-81.2
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    • 2012
  • To fabricate a metal mold for injection molding, hot-embossing and imprinting process, mechanical machining, electro discharge machining (EDM), electrochemical machining (ECM), laser process and wet etching ($FeCl_3$ process) have been widely used. However it is hard to get precise structure with these processes. Electrochemical etching has been also employed to fabricate a micro structure in metal mold. A through mask electrochemical micro machining (TMEMM) is one of the electrochemical etching processes which can obtain finely precise structure. In this process, many parameters such as current density, process time, temperature of electrolyte and distance between electrodes should be controlled. Therefore, it is difficult to predict the result because it has low reliability and reproducibility. To improve it, we investigated this process numerically and experimentally. To search the relation between processing parameters and the results, we used finite element simulation and the commercial finite element method (FEM) software ANSYS was used to analyze the electric field. In this study, it was supposed that the anodic dissolution process is predicted depending on the current density which is one of major parameters with finite element method. In experiment, we used stainless steel (SS304) substrate with various sized square and circular array patterns as an anode and copper (Cu) plate as a cathode. A mixture of $H_2SO_4$, $H_3PO_4$ and DIW was used as an electrolyte. After electrochemical etching process, we compared the results of experiment and simulation. As a result, we got the current distribution in the electrolyte and line profile of current density of the patterns from simulation. And etching profile and surface morphologies were characterized by 3D-profiler(${\mu}$-surf, Nanofocus, Germany) and FE-SEM(S-4800, Hitachi, Japan) measurement. From comparison of these data, it was confirmed that current distribution and line profile of the patterns from simulation are similar to surface morphology and etching profile of the sample from the process, respectively. Then we concluded that current density is more concentrated at the edge of pattern and the depth of etched area is proportional to current density.

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The effect of wet-etching process on the gate insulator for fabrication of metal tip FEA (Metal tip FEA 의 제조시 식각 용액이 게이트 산화막에 미치는 영향)

  • Jung, Yu-Ho;Jung, Jae-Hoon;Park, Heung-Woo;Song, Man-Ho;Lee, Yun-Hi;Ju, Byeong-Kwon;Oh, Myung-Hwan;Kim, Chul-Ju
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1450-1452
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    • 1996
  • In order to optimize the characteristics of gate insulator for FED(field emission device), we investigated the effect of wet-etching process on the gate insulator for fabrication of FED. We used the general three types of etchants for fabrication of the metal tip FEA(field emitter array), they are MO and oxide etchants to form the gate hole, and Al etchant to remove the release layer. In the result of the breakdown field of the insulator by the measure of the current-voltage characteristics, the breakdown field of insulator for immersing in oxide etchant was rapidly lowering with increasing etching time, but that for immersing in Al etchant was slow lowering. Also, in comparing cleaning with non-cleaning samples, the breakdown field of the cleaning samples was higher than that of non-cleaning samples.

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Fabrication of Viewing Angle Direction Brightness-Enhancement Optical Films using Surface Textured Silicon Wafers

  • Jang, Wongun;Shim, Hamong;Lee, Dong-Kil;Park, Youngsik;Shin, Seong-Seon;Park, Jong-Rak;Lee, Ki Ho;Kim, Insun
    • Journal of the Optical Society of Korea
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    • v.18 no.5
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    • pp.569-573
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    • 2014
  • We demonstrate a low-cost, superbly efficient way of etching for the nano-, and micro-sized pyramid patterns on (100)-oriented Si wafer surfaces for use as a patterned master. We show a way of producing functional optical films for the viewing angle direction brightness-enhancement of Lambertian LED (light emitting diode)/OLED (organic light emitting diode) planar lighting applications. An optimally formulated KOH (Potassium hydroxide) wet etching process enabled random-positioned, and random size-distributed (within a certain size range) pyramid patterns to be developed over the entire (100) silicon wafer substrates up to 8" and a simple replication process of master patterns onto the PC (poly-carbonate) and PMMA (poly-methyl methacrylate) films were performed. Haze ratio values were measured for several film samples exhibiting excellent values over 90% suitable for LED/OLED lighting purposes. Brightness was also improved by 13~14% toward the viewing angle direction. Computational simulations using LightTools$^{TM}$ were also carried out and turned out to be in strong agreement with experimental data. Finally, we could check the feasibility of fabricating low-cost, large area, high performance optical films for commercialization.

A Study on dry decapsulation by Using a UV Laser (자외선 레이저를 이용한 건식디캡슐레이션에 관한 연구)

  • Hong, Y.S.;Kim, J.B.;Seo, M.H.;Choi, J.H.;Yoon, M.K.;Nam, G.J.
    • Laser Solutions
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    • v.11 no.1
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    • pp.7-11
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    • 2008
  • Decapsulation technology is useful to inspect EMC of package device and the etching technology enable to check inside of device by removing plastic molding. Chemical etching method is used widely to fabricate a lot of semiconductor. But the method has some disadvantage due to wet process. Proposed method in this paper shows the application possibility such as fast processing time, processing accuracy and dry process. These result was obtained by directly removing of packed EMC using UV laser.

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Etch Resistance of Mask Layer modified by AFM-based Tribo-Nanolithography in Aqueous Solution (AFM 기반 액중 Tribo nanolithography 에서의 마스크 층 내식각성에 관한 연구)

  • Park Jeong-Woo;Lee Deug-Woo;Kawasegi Noritaka;Morita Noboru
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.10a
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    • pp.268-271
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    • 2005
  • Etch resistance of mask layer on silicon substrate modified by AFM-based Tribo-Nanolithography (TNL) in Aqueous Solution in an aqueous solution was demonstrated. n consists or sequential processes, nano-scratching and wet chemical etching. The simple scratching can form a mask layer on the silicon substrate, which acting as an etching mask. For TNL, a specially designed cantilever with diamond tip, allowing the formation of mask layer on silicon substrate easily by a simple scratching process, has been applied instead of conventional silicon cantilever fur scanning. This study demonstrates how the TNL parameters can affect the etch resistance of mask layer, hence introducing a new process of AFM-based maskless nanolithography in aqueous solution.

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Effect of Surface Microstructure of Silicon Substrate on the Reflectance and Short-Circuit Current (실리콘 기판 표면 형상에 따른 반사특성 및 광 전류 개선 효과)

  • Yeon, Chang Bong;Lee, Yoo Jeong;Lim, Jung Wook;Yun, Sun Jin
    • Korean Journal of Materials Research
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    • v.23 no.2
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    • pp.116-122
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    • 2013
  • For fabricating silicon solar cells with high conversion efficiency, texturing is one of the most effective techniques to increase short circuit current by enhancing light trapping. In this study, four different types of textures, large V-groove, large U-groove, small V-groove, and small U-groove, were prepared by a wet etching process. Silicon substrates with V-grooves were fabricated by an anisotropic etching process using a KOH solution mixed with isopropyl alcohol (IPA), and the size of the V-grooves was controlled by varying the concentration of IPA. The isotropic etching process following anisotropic etching resulted in U-grooves and the isotropic etching time was determined to obtain U-grooves with an opening angle of approximately $60^{\circ}$. The results indicated that U-grooves had a larger diffuse reflectance than V-grooves and the reflectances of small grooves was slightly higher than those of large grooves depending on the size of the grooves. Then amorphous Si:H thin film solar cells were fabricated on textured substrates to investigate the light trapping effect of textures with different shapes and sizes. Among the textures fabricated in this work, the solar cells on the substrate with small U-grooves had the largest short circuit current, 19.20 mA/$cm^2$. External quantum efficiency data also demonstrated that the small, U-shape textures are more effective for light trapping than large, V-shape textures.