• Title/Summary/Keyword: weak metric scheme

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WEAK METRIC AND WEAK COMETRIC SCHEMES

  • Kim, Dae-San;Kim, Gil-Chun
    • Journal of the Korean Mathematical Society
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    • v.46 no.4
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    • pp.785-812
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    • 2009
  • The notion of weak metric and weak cometric schemes are introduced as a generalization of metric and cometric schemes. They are given as the wreath product of a finite number of symmetric association schemes satisfying certain equivalent conditions which are analogous to the ones for metric or cometric schemes. We characterize those schemes and determine some of their parameters.

CONVERGENCE THEOREMS FOR GENERALIZED EQUILIBRIUM PROBLEMS AND ASYMPTOTICALLY κ-STRICT PSEUDO-CONTRACTIONS IN HILBERT SPACES

  • Liu, Ying
    • East Asian mathematical journal
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    • v.29 no.3
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    • pp.303-314
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    • 2013
  • In this paper, we introduce an iterative scheme for finding a common element of the set of solutions of a generalized equilibrium problem and the set of common fixed points of a finite family of asymptotically ${\kappa}$-strict pseudo-contractions in Hilbert spaces. Weak and strong convergence theorems are established for the iterative scheme.

The viterbi decoder implementation with efficient structure for real-time Coded Orthogonal Frequency Division Multiplexing (실시간 COFDM시스템을 위한 효율적인 구조를 갖는 비터비 디코더 설계)

  • Hwang Jong-Hee;Lee Seung-Yerl;Kim Dong-Sun;Chung Duck-Jin
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.2 s.332
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    • pp.61-74
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    • 2005
  • Digital Multimedia Broadcasting(DMB) is a reliable multi-service system for reception by mobile and portable receivers. DMB system allows interference-free reception under the conditions of multipath propagation and transmission errors using COFDM modulation scheme, simultaneously, needs powerful channel error's correction ability. Viterbi Decoder for DMB receiver uses punctured convolutional code and needs lots of computations for real-time operation. So, it is desired to design a high speed and low-power hardware scheme for Viterbi decoder. This paper proposes a combined add-compare-select(ACS) and path metric normalization(PMN) unit for computation power. The proposed PMN architecture reduces the problem of the critical path by applying fixed value for selection algorithm due to the comparison tree which has a weak point from structure with the high-speed operation. The proposed ACS uses the decomposition and the pre-computation technique for reducing the complicated degree of the adder, the comparator and multiplexer. According to a simulation result, reduction of area $3.78\%$, power consumption $12.22\%$, maximum gate delay $23.80\%$ occurred from punctured viterbi decoder for DMB system.