• 한국재료학회:학술대회논문집
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• 한국재료학회 2000년도 추계학술발표강연 및 논문개요집
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• pp.97-97
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• 2000

• 대한산업공학회지
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• 제35권4호
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• pp.266-279
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• 2009

This paper focuses on the problem of scheduling wafer lots with limited waiting times between pairs of consecutive operations in a semiconductor wafer fabrication facility. For the problem of minimizing total tardiness of orders, we develop a priority rule based scheduling method in which a scheduling decision for an operation is made based on the states of workstations for the operation and its successor or predecessor operation. To evaluate performance of the suggested scheduling method, we perform simulation experiments using real factory data as well as randomly generated data sets. Results of the simulation experiments show that the suggested method performs better than a method suggested in other research and the one that has been used in practice.

• 한국전기전자재료학회논문지
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• 제15권4호
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• pp.301-307
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• 2002

Direct bonded SOI wafer pairs with $Si ll SiO_2/Si_3N_4 ll Si$ the heterogeneous insulating layers of SiO$_2$-Si$_3$N$_4$are able to apply to the micropumps and MEMS applications. Direct bonding should be executed at low temperature to avoid the warpage of the wafer pairs and inter-diffusion of materials at the interface. 10 cm diameter 2000 ${\AA}-SiO_2/Si(100}$ and 560 $\AA$- ${\AA}-Si_3N_4/Si(100}$ wafers were prepared, and wet cleaned to activate the surface as hydrophilic and hydrophobic states, respectively. Cleaned wafers were pre- mated with facing the mirror planes by a specially designed aligner in class-100 clean room immediately. We employed a heat treatment equipment so called fast linear annealing(FLA) with a halogen lamp to enhance the bonding of pre mated wafers We kept the scan velocity of 0.08 mm/sec, which implied bonding process time of 125 sec/wafer pairs, by varying the heat input at the range of 320~550 W. We measured the bonding area by using the infrared camera and the bonding strength by the razor blade clack opening method, respective1y. It was confirmed that the bonding area was between 80% and to 95% as FLA heat input increased. The bonding strength became the equal of $1000^{\circ}C$ heat treated $Si ll SiO_2/Si_3N_4 ll Si$ pair by an electric furnace. Bonding strength increased to 2500 mJ/$\textrm{m}^2$as heat input increased, which is identical value of annealing at $1000^{\circ}C$-2 hr with an electric furnace. Our results implies that we obtained the enough bonding strength using the FLA, in less process time of 125 seconds and at lowed annealing temperature of $400^{\circ}C$, comparing with the conventional electric furnace annealing.

• 한국재료학회지
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• 제16권10호
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• pp.652-655
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• 2006

A direct wafer bonding process necessary for GaAs-on-insulator (GOI) fabrication with high thermal annealing temperatures was studied by using PECVD oxides between gallium arsenide and silicon wafers. In order to apply some uniform pressure on initially-bonded wafer pairs, a graphite sample holder was used for wafer bonding. Also, a tool for measuring the tensile forces was fabricated to measure the wafer bonding strengths of both initially-bonded and thermally-annealed samples. GaAs/$SiO_2$/Si wafers with 0.5-$\mu$m-thick PECVD oxides were annealed from $100^{\circ}C\;to\;600^{\circ}C$. Maximum bonding strengths of about 84 N were obtained in the annealing temperature range of $400{\sim}500^{\circ}C$. The bonded wafers were not separated up to $600^{\circ}C$. As a result, the GOI wafers with high annealing temperatures were demonstrated for the first time.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1988-1990
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• 1996

In this work, we have grown or evaporated thermal oxide and E-beam oxide on the (100) oriented n-type silicon wafers, respectively and they were directly bonded with another silicon wafer after hydrophilization using solutions of three types of $HNO_3$, $H_{2}SO_{4}$ and $NH_{4}OH$. Changes of average surface roughness after hydrophilizations of the single crystalline silicon wafer, thermal oxide and E-beam evaporated silicon oxide were studied using atomic force microscope. Bonding interfaces of the bonded pairs were inspected using scanning electron microscope. Void and non-contact area of the bonded pairs were also inspected using infrared transmission microscope.

• 한국재료학회지
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• 제4권2호
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• pp.127-135
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• 1994

직접 접합된 Si 기판들의 접합계면에 관하여 연구하였다. 경사 연마 및 결함묘사, 계면의 비등방성 식각, TEM 및 HR-TEM 등의 방법들을 이용하여 접합계면에 발생하는 계면결함과 과도영역, 여러형태의 void 들, 계면 산화막의 형성 및 안정화 과정등을 조사하였다. 또한 접합된 $Si-Sio_{2}$계면과 일반적인 $Si-Sio_{2}$계면의 형상등을 비교 검토하였다.

• Korean Chemical Engineering Research
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• 제45권5호
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• pp.466-472
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• 2007

웨이퍼 레벨(WL) 3차원(3D) 집적을 구현하기 위해 저유전체 고분자를 본딩 접착제로 이용한 웨이퍼 본딩과, 적층된 웨이퍼간 전기배선 형성을 위해 구리 다마신(damascene) 공정을 사용하는 방법을 소개한다. 이러한 방법을 이용하여 웨이퍼 레벨 3차원 칩의 특성 평가를 위해 적층된 웨이퍼간 3차원 비아(via) 고리 구조를 제작하고, 그 구조의 기계적, 전기적 특성을 연속적으로 연결된 서로 다른 크기의 비아를 통해 평가하였다. 또한, 웨이퍼간 적층을 위해 필수적인 저유전체 고분자 수지를 이용한 웨이퍼 본딩 공정의 다음과 같은 특성 평가를 수행하였다. (1) 광학 검사에 의한 본딩된 영역의 정도 평가, (2) 면도날(razor blade) 시험에 의한 본딩된 웨이퍼들의 정성적인 본딩 결합력 평가, (3) 4-점 굽힘시험(four point bending test)에 의한 본딩된 웨이퍼들의 정량적인 본딩 결합력 평가. 본 연구를 위해 4가지의 서로 다른 저유전체 고분자인 benzocyclobutene(BCB), Flare, methylsilsesquioxane(MSSQ) 그리고 parylene-N을 선정하여 웨이퍼 본딩용 수지에 대한 적합성을 검토하였고, 상기 평가 과정을 거쳐 BCB와 Flare를 1차적인 본딩용 수지로 선정하였다. 한편 BCB와 Flare를 비교해 본 결과, Flare를 이용하여 본딩된 웨이퍼들이 BCB를 이용하여 본딩된 웨이퍼보다 더 높은 본딩 결합력을 보여주지만, BCB를 이용해 본딩된 웨이퍼들은 여전히 칩 back-end-of-the-line (BEOL) 공정조건에 부합되는 본딩 결합력을 가지는 동시에 동공이 거의 없는 100%에 가까운 본딩 영역을 재현성있게 보여주기 때문에 본 연구에서는 BCB가 본딩용 수지로 더 적합하다고 판단하였다.

• Smart Structures and Systems
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• 제12권2호
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• pp.97-119
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• 2013

This paper presents numerical and experimental results on the use of guided waves for structural health monitoring (SHM) of crack growth during a fatigue test in a thick steel plate used for civil engineering application. Numerical simulation, analytical modeling, and experimental tests are used to prove that piezoelectric wafer active sensor (PWAS) can perform active SHM using guided wave pitch-catch method and passive SHM using acoustic emission (AE). AE simulation was performed with the multi-physic FEM (MP-FEM) approach. The MP-FEM approach permits that the output variables to be expressed directly in electric terms while the two-ways electromechanical conversion is done internally in the MP-FEM formulation. The AE event was simulated as a pulse of defined duration and amplitude. The electrical signal measured at a PWAS receiver was simulated. Experimental tests were performed with PWAS transducers acting as passive receivers of AE signals. An AE source was simulated using 0.5-mm pencil lead breaks. The PWAS transducers were able to pick up AE signal with good strength. Subsequently, PWAS transducers and traditional AE transducer were applied to a 12.7-mm CT specimen subjected to accelerated fatigue testing. Active sensing in pitch catch mode on the CT specimen was applied between the PWAS transducers pairs. Damage indexes were calculated and correlated with actual crack growth. The paper finishes with conclusions and suggestions for further work.

• 센서학회지
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• 제30권4호
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• pp.250-254
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• 2021

A highly sensitive and selective non-dispersive infrared (NDIR) carbon dioxide gas sensor requires achieving high transmittance and narrow full width at half maximum (FWHM), which depends on the interface of the optical filter for precise measurement of carbon dioxide concentration. This paper presents the design, simulation, and fabrication of a Fabry-Perot filter based on a distributed Bragg reflector (DBR) for a low-cost NDIR carbon dioxide sensor. The Fabry-Perot filter consists of upper and lower DBR pairs, which comprise multilayered stacks of alternating high- and low-index thin films, and a cavity layer for the resonance of incident light. As the number of DBR pairs inside the reflector increases, the FWHM of the transmitted light becomes narrower, but the transmittance of light decreases substantially. Therefore, it is essential to analyze the relationship between the FWHM and transmittance according to the number of DBR pairs. The DBR is made of silicon and silicon dioxide by RF magnetron sputtering on a glass wafer. After the optimal conditions based on simulation results were realized, the DBR exhibited a light transmittance of 38.5% at 4.26 ㎛ and an FWHM of 158 nm. The improved results substantiate the advantages of the low-cost and minimized process compared to expensive commercial filters.

• 전자공학회논문지A
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• 제29A권1호
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• pp.41-47
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• 1992

In SFB Process, after 110$0^{\circ}C$ annealing in wet OS12T(95$^{\circ}C$ HS12TO bubbling) atmosphere, the existence of the interfacial oxide film in micro-gap at Si-Si bonding interface was identified. The angle lapping/staining and SEM morphologies of bonding interface showed that the growing behavior of interfacial oxide made a contribution to eliminate the micro-gaps having a width of 200-300$\AA$. In case of the diodes composed of p-n wafer pairs made by SFB processes, the annealed one in wet OS12T atmosphere exhibited a dielectric breakdown phenomena of interfacial oxide at 37-40 volts d.c.