• 반도체디스플레이기술학회지
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• 제9권1호
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• pp.11-16
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• 2010

Wafer Pre-Alignment is to find the center and the orientation of a wafer and to move the wafer to the desired position and orientation. In this paper, an area camera based pre-aligning method is presented that captures 8 wafer images regularly during 360 degrees rotation. From the images, wafer edge positions are extracted and used to estimate the wafer's center and orientation using least squares circle fitting. These data are utilized for the proper alignment of the wafer. For accurate alignments, camera calibration methods using high order polynomials are used for converting pixel coordinates into real-world coordinates. A complete pre-alignment system was constructed using mechanical and optical components and tested. Experimental results show that alignment of wafer center and orientation can be done with the standard deviation of 0.002 mm and 0.028 degree, respectively.

• 제어로봇시스템학회논문지
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• 제8권9호
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• pp.812-817
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• 2002

This paper presents a development of high accuracy aligner and describes a method to find the orientation of a substantially circular disk shaped wafer with at least one flat region on an edge thereof. In the developed system, the wafer is spun one 360 degree turn on a chuck and the edge position is measured by a linear array to obtain a set of data points at various wafer orientation. The rotation axis may differ from wafer center by an unknown eccentricity. The flat angle is found by fitting a cosine curve to the actual data to obtain a deviation. The maximum deviation is then corrected for errors due to a finite number of data points and wafer eccentricity by calculating an adjustment angle from data points on the wafer fiat. After determining the flat angle the wafer is spun to the desired orientation. The wafer eccentricity can be calculated from four of the data points located away from the flat edge region. and the wafer is then centered.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2009년도 추계학술대회
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• pp.410-413
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• 2009

웨이퍼 Pre-Alignment는 반도체 공정에서 장비에 웨이퍼를 놓기 전에 웨이퍼의 중심 및 방향을 정확하게 정렬할 필요가 있는데, 이를 위해서 일정한 수준 이하로 중심과 방향을 찾아 Alignment 하는 방법을 말한다. 본 논문에서는 웨이퍼를 Alignment 하기 위해 기존의 Mechanical한 방법이 아닌 Area 카메라를 통한 비접촉식 방법을 이용하였다. 이 방법은 웨이퍼를 45도씩 8번씩, 한 바퀴를 회전하여 이미지를 획득한 뒤, 이미지의 웨이퍼의 에지값 들을 이용하여 Least Square Circle Fitting을 이용하여 웨이퍼의 중심과 방향을 정확하게 측정하여 Alignment를 한다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 International Symposium
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• pp.261-278
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• 2003

Concepts.Wafer-Level Chip-Scale Concept with Handling Substrate.Low Accuracy Placement Layout with Isolation Trench.Possible Pitch of Interconnections down to $10{\mu}{\textrm}{m}$ (Sn-Grains).Wafer-to-Wafer Equipment Adjustment Accuracy meets this Request of Alignment Accuracy (+/-1.5 ${\mu}{\textrm}{m}$).Adjustment Accuracy of High-Speed Chip-to-Wafer Placement Equipment starts to meet this request.Face-to-Face Modular / SLID with Flipped Device Orientation.interchip Via / SLID with Non-Flipped Orientation SLID Technology Features.Demonstration with Copper / Tin-Alloy (SLID) and W-InterChip Vias (ICV).Combination of reliable processes for advanced concept - Filling of vias with W as standard wafer process sequence.No plug filling on stack level necessary.Simultanious formation of electrical and mechanical connection.No need for underfiller: large area contacts replace underfiller.Cu / Sn SLID layers $\leq$ $10{\mu}{\textrm}{m}$ in total are possible Electrical Results.Measurements of Three Layer Stacks on Daisy Chains with 240 Elements.2.5 Ohms per Chain Element.Contribution of Soldering Metal only in the Range of Milliohms.Soldering Contact Resistance ($0.43\Omega$) dominated by Contact Resistance of Barrier and Seed Layer.Tungsten Pin Contribution in the Range of 1 Ohm

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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• pp.411-414
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• 1998

In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PT layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PT layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PT layer of c-axial orientation rained thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PT layer were measured, too.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2002년도 춘계학술대회 논문집
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• pp.42-45
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• 2002

General wheel mark in mono-crystalline silicon wafer finding is able to be expected because it depends on radius ratio and angular velocity ratio of wafer and wheel. The pattern is predominantly determined by the contour of abrasive grits resulting from a relative motion. Although such a wheel mark is made uniform pattern if the process parameters are fixed, sub-surface defect is expected to be distributed non-uniformly because of characteristic of mono-crystalline silicon wafer that has diamond cubic crystal. Consequently it is considered that this phenomenon affects the following process. This paper focused on kinematic analysis of wafer grinding process and simulation program was developed to verify the effect of process variables on wheel mark. And finally, we were able to predict sub-surface defect distribution that considered characteristic of mono-crystalline silicon wafer

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 G
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• pp.2501-2503
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• 1998

In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PTO layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PTO layer of c-axial orientation raised thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PTO layer were measured, too.

• 한국기계가공학회지
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• 제12권5호
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• pp.30-35
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• 2013

In order to increase cell efficiency in crystalline silicon solar cell, reduction of light reflection is one of the essential problem. Until now silicon wafer was textured by wet etching process which has random patterns along crystal orientation. In this study, high aspect ratio patterns are manufactured by nano imprint process and reflectance could be minimized under 1%. After that, screen printed solar cell was fabricated on the textured wafer and I-V characteristics was measured by solar simulator. Consequently cell efficiency of solar cell fabricated using the wafer textured by nano imprint process increased 1.15% than reference solar cell textured by wet etching. Internal quantum efficiency was increased in the range of IR wave length but decreased in the UV wavelength. In spite of improved result, optimization between nano imprinted pattern and solar cell process should be followed.

• 한국전기전자재료학회논문지
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• 제11권10호
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• pp.815-819
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• 1998

The silicon-nirtide membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PRO($PbTiO_3$ ) layer for a IR detection was coated on the membrane and its characteristics were measured. The a attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer were eliminated through the method of bonding/etching of silicon wafer. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by the PTO layer were measured, too.

• 한국결정학회지
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• 제12권4호
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• pp.233-238
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• 2001

1㎛ 이하로 집속된 방사광원으로부터의 x-선을 이용하여 새로운 분석법인 x-선 미세회절(x-ray microdiffraction)을 사용하면 다결정시료 내 grain들의 방위나 strain의 국지적 분포를 정밀하게 측정할 수 있다. 포항가속기연구소 방사광원의 x-ray microbeam 실험 장치를 사용하여 찍은 Laue 사진을 측별히 쓰여진 분석 software를 이용하여 분석함으로써 고집적회로에 쓰이는것과 같은 방법으로 제작된 Si wafer 상의 다른 선폭의 구리 도선들이 가지는 texture 를 밝혀내었다. 실험시 x-ray빔의 크기는 2×3㎛²정도이었으며, 분석 결과에의하면 선폭 1㎛도선에서는 grain들이 방위가 특정한 방향성이 없는 반면, 선폭 20㎛도선의 중앙부분에서는 〈111〉fiber texture 가 관측되었다. Grain들의 크기는 선폭 1㎛의도선에서 2∼5㎛, 선폭 20㎛의도선에서는 6∼8㎛로 측정되었다.