• 제목/요약/키워드: voltage converter

검색결과 3,993건 처리시간 0.027초

A New Definition of Short-circuit Ratio for Multi-converter HVDC Systems

  • Liu, Dengfeng;Shi, Dongyuan;Li, Yinhong
    • Journal of Electrical Engineering and Technology
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    • 제10권5호
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    • pp.1958-1968
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    • 2015
  • In this paper, a new definition of short-circuit ratio concept for multi-converter HVDC systems is proposed. Analysis results of voltage interaction between converters show that the reactive power-voltage characteristic of a converter has a dominant effect on voltage interaction level compared with its active power-voltage characteristic. Such a relation between converter reactive power and voltage interaction level supports taking the former into account in the definition of short-circuit ratio concept for multi-converter systems. The proposed definition is verified by the method of maximum power curve for various system configurations. Furthermore, a formula to calculate transient overvoltage for multi-converter systems is derived based on the proposed definition, and the efficiency of the derived formula is verified.

Design and Control Methods of Bidirectional DC-DC Converter for the Optimal DC-Link Voltage of PMSM Drive

  • Kim, Tae-Hoon;Lee, Jung-Hyo;Won, Chung-Yuen
    • Journal of Electrical Engineering and Technology
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    • 제9권6호
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    • pp.1944-1953
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    • 2014
  • This paper shows the design and control methods of the bidirectional DC-DC converter to generate the proper DC-link voltage of a PMSM drive. Conventionally, because the controllable power of the PWM based voltage source inverter is limited by its DC-link voltage, the DC-DC converter is used for boosted DC-link voltage if the inverter source cannot generate enough operating voltage for the PMSM drive. In this paper, to obtain more utilization of this DC-DC converter, optimal DC-link voltage control for PMSM drive will be explained. First, the process and current path of the DC-DC converter will be illustrated, and a control method of this converter for variable DC-link voltage will then be explained. Finally, an improvement analysis of the optimal DC-link voltage control method, especially on the deadtime effect, will be explained. The DC-DC converter of the proposed control method is verified by the experiments by comparing with the conventional constant voltage control method.

넓은 입력전압 범위에서 높은 효율을 가지는 위상천이 풀브릿지 컨버터 (A High Efficiency Phase-Shifted Full-Bridge Converter with Wide Input Voltage Range)

  • 한정규;최승현;문건우
    • 전력전자학회논문지
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    • 제24권1호
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    • pp.66-69
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    • 2019
  • This study proposes a high-efficiency phase-shifted full-bridge (PSFB) converter with a wide input voltage range. The conventional PSFB converter is a useful topology in high-power applications. This converter not only achieves the zero-voltage switching of the primary switches, but also has small RMS current in the primary side. However, because the conventional PSFB converter has large freewheeling current in the primary side when it is designed considering the hold-up time of the converter, such a converter has high conduction loss at the primary switches. To solve this problem, a new PSFB converter is proposed in this study. The experiment is implemented with an input voltage ranging from a 320 V-400 V and an output power specification of 715 W.

Analysis, Design and Implementation of a Soft Switching DC/DC Converter

  • Lin, Bor-Ren
    • Journal of Power Electronics
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    • 제13권1호
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    • pp.20-30
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    • 2013
  • This paper presents a soft switching DC/DC converter for high voltage application. The interleaved pulse-width modulation (PWM) scheme is used to reduce the ripple current at the output capacitor and the size of output inductors. Two converter cells are connected in series at the high voltage side to reduce the voltage stresses of the active switches. Thus, the voltage stress of each switch is clamped at one half of the input voltage. On the other hand, the output sides of two converter cells are connected in parallel to achieve the load current sharing and reduce the current stress of output inductors. In each converter cell, a half-bridge converter with the asymmetrical PWM scheme is adopted to control power switches and to regulate the output voltage at a desired voltage level. Based on the resonant behavior by the output capacitance of power switches and the transformer leakage inductance, active switches can be turned on at zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. The current doubler rectifier is used at the secondary side to partially cancel ripple current. Therefore, the root-mean-square (rms) current at output capacitor is reduced. The proposed converter can be applied for high input voltage applications such as a three-phase 380V utility system. Finally, experiments based on a laboratory prototype with 960W (24V/40A) rated power are provided to demonstrate the performance of proposed converter.

마이크로프로세서 제어를 이용한 DC-DC Buck Converter 설계 (Design of DC-DC Buck Converter Using Micro-processor Control)

  • 장인혁;한지훈;임홍우
    • 공학기술논문지
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    • 제5권4호
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    • pp.349-353
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    • 2012
  • Recently, Mobile multimedia equipments as smart phone and tablet pc requirement is increasing and this market is also being expanded. These mobile equipments require large multi-media function, so more power consumption is required. For these reasons, the needs of power management IC as switching type dc-dc converter and linear regulator have increased. DC-DC buck converter become more important in power management IC because the operating voltage of VLSI system is very low comparing to lithium-ion battery voltage. There are many people to be concerned about digital DC-DC converter without using external passive device recently. Digital controlled DC-DC converter is essential in mobile application to various external circumstance. This paper proposes the DC-DC Buck Converter using the AVR RISC 8-bit micro-processor control. The designed converter receives the input DC 18-30 [V] and the output voltage of DC-DC Converter changes by the feedback circuit using the A/D conversion function. Duty ratio is adjusted to maintain a constant output voltage 12 [V]. Proposed converter using the micro-processor control was compared to a typical boost converter. As a result, the current loss in the proposed converter was reduced about 10.7%. Input voltage and output voltage can be displayed on the LCD display to see the status of the operation.

AT 포워드 다중 공진형 컨버터의 동작 특성 (The operational characteristics of the AT Forward Multi-Resonant Converter)

  • 김창선
    • 조명전기설비학회논문지
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    • 제12권3호
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    • pp.114-123
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    • 1998
  • The multi-resonant converter(MRC) minimizes a parasitic oscillation by using the resonant tank circuit absorbed parasitic reactances existing in a converter circuit. So it si possible that the converter operated at a high frequency has a high efficiency because the losses are reduced. Such a MHz high frequency applications provide a high power density [W/inch3] of the converter. But the resonant voltage stress across a switch of the resonant tank circuit is 4~5 times a input voltage. This h호 voltage stress increases the conduction loss because of on-resistance of a MOSFET with higher rating. Thus, in this paper we proposed the alternated multi-resonant converter (AT MRC) differ from the clamp mode multi-resonant converter and applicated it to the forward MRC. The AT forward MRC can reduce the voltage stress to 2~3 times a input voltage by using two series input capacitor. The control circuit is simple because tow resonant switches are driven directly by the output pulse of the voltage controled oscillator. This circuit type is verified through the experimental converter with 48V input voltage, 5V/50W output voltage/power and PSpice simulation. the measured maximum voltage stress is 170V of 2.9 times the input voltage and the maximum efficiency of 81.66% is measured.

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A new interleaved high step up converter with low voltage stress on the main switches

  • Tohidi, Babak;Delshad, Majid;Saghafi, Hadi
    • Smart Structures and Systems
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    • 제26권4호
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    • pp.521-531
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    • 2020
  • In this paper, a new interleaved high step-up converter with low voltage stress on the switches is proposed. In the proposed converter, soft switching is provided for all switches by just one auxiliary switch, which decreases the conduction loss of auxiliary circuit. Also, the auxiliary circuit is expanded on the converter with more input branches. In the converter all main switches operate under zero voltage switching condition and auxiliary switch operate under zero current switching condition. Because of the interleaved structure, the reliability of converter increases and input current ripples decreases. The clamp capacitor in the converter not only absorb the voltage spikes across the switch due to leakage inductance, but also improve voltage gain. The proposed converter is fully analyzed and to verify the theoretical analysis, a 100 W prototype was implemented. Also, to show the effectiveness of auxiliary circuit on conduction EMI, EMI of the proposed converter comprised with hard switching counterpart.

강압형과 하프 브리지 직렬형 DC-DC 컨버터 (Buck and Half Bridge Series DC-DC Converter)

  • 김창선
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제54권12호
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    • pp.616-621
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    • 2005
  • We considered of the buck and half bridge series DC-DC converter. It has good applications in areas with low voltage/high current, wide input voltage. The buck converter ratings and the half bridge converter ratings are $36\~72V$ input and 22V/5A output, $19\~24V$ input and 3.3V/30A output, respectively. Developed the buck and half Bridge series DC-DC converter ratings are of $36\~72V$ input and 3.3V/30A output. The buck converter is operated with zero voltage switching process to reduce the switching losses. The $80.1\%\~97.6\%$ of the efficiency is measured at $18.4{\mu}H$ output filter inductance of buck converter. In the half bridge converter, the $86\%\~96.4\%$ efficiency is measured at 150kHz switching frequency with PQI core. In the case of synchronized the buck and half bridge DC-DC converter, the measured efficiency is higher than that of the unsynchronized converter. In the synchronized converter, the maximum efficiency is measured up to $92.3\%$ with PQI core at 150kHz. 7A output.

4kW급 고효율 직렬 공진형 DAB 컨버터 개발 (Development of a 4kW, High Efficiency, Series-Resonant DAB Converter)

  • 이상민;김길동;이승환
    • 전력전자학회논문지
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    • 제27권6호
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    • pp.498-506
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    • 2022
  • This study proposes a design methodology for bidirectional, series-resonant, dual-active bridge (SRDAB) converters. The circuit parameters of the SRDAB converters are designed by considering the output power and efficiency of the converter. The proposed method can be used to design a high-power, high-efficiency SRDAB converter. A voltage controller is employed to manipulate the output voltage of the converter, and the controller gains are selected using the transfer function and frequency response of the controller. Simulation results show that the output power of the designed SRDAB converter is 2 kW per converter module as designed. In addition, the performance of the voltage controller is evaluated using the simulation and experimental results. The output voltage follows the reference voltage within 10 ms under the step change of the reference command. The output voltage also follows the reference voltage under the step load change. The efficiency of the designed SRDAB converter is 95.6%.

A Study of On-Chip Voltage Down Converter for Semiconductor Devices

  • Seo, Hae-Jun;Kim, Young-Woon;Cho, Tae-Won
    • 전기전자학회논문지
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    • 제12권1호
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    • pp.34-42
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    • 2008
  • This paper proposes a new on-chip voltage down converter(VDC), which employs a new reference voltage generator(RVG). The converter adopts a temperature-independence reference voltage generator, and a voltage-up converter. The architecture of the proposed VDC has a high-precision, and it was verified based on a 0.25${\mu}m$ 1P5M standard CMOS technology. For 2.5V to 1.0V conversion, the RVG circuit has a good characteristics such as temperature dependency of only 0.2mV/$^{\circ}C$, and the voltage-up circuit has a good voltage deviation within ${\pm}$0.12% for ${\pm}$5% variation of supply voltage VDD. The output voltage is stabilized with ${\pm}$1mV for load current varying from 0 to 100mA.

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