• Title/Summary/Keyword: virtual switch

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Three Dimensional Networked Virtual Reailty Architecture Enabling Flexible Configuration Based on Function Distribution

  • Yasuyuki-KIYOSUE;Shohei-SUGAWARA;Shigeki-MASAKI;Susumu-ICHINOSE
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1999.06a
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    • pp.23.1-28
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    • 1999
  • InterSpaceTM is an advanced networked virtual reality system that presents shared three-dimensional computer graphics (CG) worlds via the Internet where multiple users can enjoy synchronous communications with voice, video and text. Users can control their avatars as a surrogate interface. In InterSpace users can walk around and interact with other people and interact with contents. In this paper, we describe the function-distributed architecture used in InterSpace. The architecture enables flexible configuration of server functions and load distribution. It also allows users to select media and client PCs to switch servers dynamically.

A Scheduling Algorithm for Input-Queued Switches (입력단에 버퍼가 있는 라우터를 위한 일정계획 방안)

  • 주운기;이형섭;이형호
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.445-448
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    • 2000
  • This paper considers a scheduling algorithm for high-speed routers, where the router has an N x N port input-queued switch and the input queues are composed of N VOQ(Virtual Output Queue)s at each input port. The major concern of the paper is on the scheduling mechanism for the router. The paper discusses the preferred levels of the performance measures and then develope a non-linear mixed integer programming. Additionally, the paper suggests a heuristic scheduling algorithm for efficient and effective switching.

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Implementation of Q3 Adaptor ATM Connection and FR Interworking Management in ATM Switch (ATM 교환기의 Q3 Adaptor ATM 연결 및 FR 연동 관리 구현)

  • 나성욱
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.10e
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    • pp.85-87
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    • 2002
  • 본 논문은 SNMP(Simple Network Management Protocol)기반의 ATM 교환 장비를 CMIP(common management information protocol)기반의 관리망에 연동하기 위한 Q3 Adaptor 기능 중 ATM 연결 관리와 Frame Relay 연동 관리를 소개한다. 본 논문의 ATM연결 관리는 점대점(Point-to-Point Permanent Virtual Connection) PVC(P)로 한정하고, FR 연동 관리는 ATM/FR 연결의 One-to-One PVC로 한정하며 ATM 밀 ATM/FR 연결에 대하여 CMIP Manager, Q3 Adaptor 및 교환 장비의 DB간 불일치 현상을 극복하기 위한 현행화 기능도 소개한다.

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Systolic Architecture Vitrual Output Queue with Weighted Round Robin Algorithm (WRR 알고리즘 지원 시스톨릭 구조 가상 출력 큐)

  • 조용권;이문기;이정희;이범철
    • Proceedings of the IEEK Conference
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    • 2002.06a
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    • pp.347-350
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    • 2002
  • In the input buffer switch system, VOQ(Virtual Output Queue) archives 100% throughput. The VOQ with the systolic architecture maintains an uniform performance regardless of a number of Packet class and output port, so that it doesn't have a limitation of scalability. In spite of these advantages, the systolic architecture VOQ is difficult to change sorting order In this paper, we Proposed a systolic architecture VOQ which support weighted round robin(WRR) algorithm to provide with flow control service.

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A Study on Implementation of a VC-Merge Capable High-Speed Switch on MPLS over ATM (ATM기반 MPLS망에서 VC-Merge 가능한 고속 스위치 구현에 관한 연구)

  • Kim, Young-Chul;Lee, Tae-Won;Lee, Dong-Won
    • The KIPS Transactions:PartC
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    • v.9C no.1
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    • pp.65-72
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    • 2002
  • In this paper, we implement a high-speed swatch tilth the function for label integration to enhance the expansion of networks using the label space of routers efficiently on MPLS over ATM networks. We propose an appropriate hardware structure to support the VC-merge function and differentiated services simultaneously. In this paper, we use the adaptive congestion control method such as EPD algorithm in carte that there is a possibility of network congestion in output buffers of each core LSR. In addition, we justify the validity of the proposed VC-merge method through simulation and comparison to conventional Non VC-merge methods. The proposed VC-merge capable switch is modeled in VHDL. synthesized, and fabricated using the SAMSUNG 0.5um SOG process.

A Scheduling of Switch Ports for IP Forwarding (IP 포워딩을 위한 스위치 포트 스케쥴링)

  • Lee, Chae-Y.;Lee, Wang-Hwan;Cho, Hee-K.
    • Journal of Korean Institute of Industrial Engineers
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    • v.25 no.2
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    • pp.233-239
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    • 1999
  • With the increase of Internet protocol (IP) packets the performance of routers became an important issue in internetworking. In this paper we examined the matching algorithm in gigabit router which has input queue with virtual output queueing. Port partitioning concept is employed to reduce the computational burden of the scheduler within a switch. The input and output ports are divided into two groups such that the matching algorithm is implemented within each input-output pair group in parallel. The matching is performed by exchanging input and output port groups at every time slot to handle all incoming traffics. Two algorithms, maximal weight matching by port partitioning (MPP) and modified maximal weight matching by port partitioning (MMPP) are presented. MMPP has the lowest delay for every packet arrival rate. The buffer size on a port is approximately 20-60 packets depending on the packet arrival rates. The throughput is illustrated to be linear to the packet arrival rate, which can be achieved under highly efficient matching algorithm.

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A Study of ATM Switch Performance Analysis in Consideration of Cell Processing Due Time and Priority (셀 처리 요구 시간 및 우선 순위를 고려한 ATM 스위치의 성능 분석에 관한 연구)

  • 양우석;이재호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12A
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    • pp.1910-1916
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    • 1999
  • This paper suggested to solve ATM switch performance and service rate which was input buffer managed scheme in ATM network with burst traffic characteristics, For this purpose, ATM multiplexer is prepared before sending for handling burst random input traffic to multiplex and then sort based on cell inter-arrival time and cell processing due time which had been marked after that. The server looks for cell header with the most shortest due time and sends it, thus it is satisfied that real time traffic for instance CBR and rt-VBR was guaranteed cell processing time to send fast than non real time traffic. For analysis of ATM switch performance with cell processing due time and priority, each output port has divided into four different virtual buffer and each buffer has assigned different cell inter-arrival time and processing due time according to ATM Forum for example CBT/rt-VBR, nrt-VBR, ABR and UBR and showed it’s optimal service parameters then analyzed service rate behaviors according to each traffic characteristics.

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Network Management for the GSMP Open Interface in the MPLS (MPLS의 GSMP 개방형 인터페이스를 위한 망 관리)

  • Cha, Yeong-Uk;Kim, Jin-Nyeon;Kim, Chun-Hui
    • The KIPS Transactions:PartC
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    • v.9C no.2
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    • pp.227-234
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    • 2002
  • MPLS which integrates routing of layer 3 and switching of layer 2, enables support for fast forwarding, traffic engineering and virtual private network services. GSMP is open interface protocol between a label switch and a controller, and it provides connection, configuration, event, performance management and synchronization. In the GSMP open interface, the functions of network management can be located either in the controller or in the label switch. To simplify the label switch and enhance the efficiency of resources, we adopt the network management model, in which the SNMP agent is located in the controller and is interworked with the GSMP. We presented the interworking scenrios between the GSMP and the network management of MPLS. We implemented the controller to verify the realization of our adopted network management model, and measured the connection setup delay of the provisioned connection.

Capturing and Modeling of Driving Skills Under a Three Dimensional Virtual Reality System Based on Hybrid System

  • Kim, Jong-Hae;Hayakawa, Soichiro;Suzuki, Tatsuya;Hirana, Kazuaki;Matsui, Yoshimichi;Okuma, Shigeru;Tsuchida, Nuio
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.2747-2752
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    • 2003
  • This paper has develops a new framework to understand the human’s driving maneuver based on the expression as HDS focusing on the driver’s stopping maneuver. The driving data has been collected by using the three-dimensional driving simulator based on CAVE, which provides three-dimensional visual information. In our modeling, the relationship between the measured information such as distance to the stop line, its first and second derivatives and the braking amount has been expressed by the PWPS model, which is a class of HDS. The key idea to solve the identification problem was to formulate the problem as the MILP with replacing the switching conditions by binary variables. From the obtained results, it is found that the driver appropriately switches the ‘control law’ according to the following scenario: At the beginning of the stopping behavior (just after finding the stopping point), the driver decelerate the vehicle based on the acceleration information, and then switch to the control law based on the distance to the stop line.

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Dynamic Path Reservation Scheme for Fast Inter-switch Handover in Wireless ATM Networks (무선 ATM 망에서 이동교환기간 빠른 핸드오버를 위한 동적 경로 예약 기법)

  • Lee, Bong-Ju;Lee, Nam-Suk;Ahn, Kye-Hyun;Kim, Young-Chon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.1A
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    • pp.7-16
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    • 2003
  • Handover is very important to support the mobility of user because wireless ATM networks have smaller cell size such as micro/pico cell for broadband mobile multimedia service In this paper, we propose dynamic path reservation handover scheme for fast inter-MSC (Mobile Switching Center) handovers To reduce the handover delay for connection re-routing, the proposed scheme reserves virtual channels from nearest common node to neighbor MSC in advance Especially, our handover scheme predicts the number of inter-MSC handover calls at each period by the prediction algorithm and reserve virtual channels The simulation and analysis results show that our scheme reduce handover complexity and has higher reservation channel utilization, compared with DVCT scheme.