• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.2
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• pp.1-9
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• 1998

ATM was adopted as the switching and multiplexing technique for BISDN which aims at transmitting traffics with various characteristics in a unified network. To construct these ATM networks, the most important aspect is the design of the switching system with high performance and different service capabilities. In this paepr, we analyze the performance of an input and output queueing switch with preemptive priority which is considered to be most suitable for ATM networks. For the analysis of an input queue, we model each input queue as two separate virtual input queues for each priority class and we approximage them asindependent Geom/Geom/1 queues. And we model a virtual HOL queue which consists of HOL cells of all virtual input queues which have the same output address to obtain the mean service time at each virtual input queue. For the analysis of an output quque, we obtain approximately the arrival process into the output queue from the state of the virtual HOL queue. We use a Markov chain method to analyze these two models and obtain the maximum throughput of the switch and the mean queueing delay of cells. and analysis results are compared with simulation to verify that out model yields accurate results.

• KNOM Review
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• v.21 no.2
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• pp.26-34
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• 2018

With the proliferation of cloud computing and services, the internet traffic and the demand for better quality of service are increasing. For this reason, server virtualization and network virtualization technology, which uses the resources of internal servers in the data center more efficiently, is receiving increased attention. However, the existing hardware Test Access Port (TAP) equipment is unfit for deployment in the virtual datapaths configured for server virtualization. Virtual TAP (vTAP), which is a software version of the hardware TAP, overcomes this problem by duplicating packets in a virtual switch. However, implementation of vTAP in a virtual switch has a performance problem because it shares the computing resources of the host machines with virtual switch and other VMs. We propose a vTAP implementation technique based on the extended Berkeley Packet Filter (eBPF), which is a high-speed packet processing technology, and compare its performance with that of the existing vTAP.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.205-208
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• 2002

An existing ATM switch fabric uses VPI(Virtual Path Identifier) and VCI(Virtual Channel Identifier) information to route ATM cell. But AAL type 2 switch which efficiently processes delay-sensitive, low bit-rate data such as a voice routes the ATM cell by using CID(Channel Identification) field in addition to VPI and VCI. In this paper, we research the AAL type 2 switch that performs the process of CPS packet. The Receive unit extracts the CPS packet from the inputted ATM cell. The designed receive unit consists of input FIFO, r)( status table, CAM(Content Addressable Memory), new CID table and partial packet memory. Also the designed receive unit supports the PCI interface with host processor. The receive unit is implemented in Xilinx FPGA and operates at 72MHz.

• The Journal of the Acoustical Society of Korea
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• v.18 no.6
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• pp.65-70
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• 1999

In ATM network there exist several traffics according to QoS, such as CBR, rt-VBR, nrt-VBR, UBR, and ABR. Many studies have done at the traffic management of ABR which uses the unused network bandwidth. Many flow control mechanisms have proposed to use efficiently the unused bandwidth. In TMWG(Traffic Management Working Group) of ATM Forum, there exist rate-based, credit-based, and mixture of them to manage flow control of ABR traffic. Among these, rate-based mechanisms adopted as standard because it is flexible and also makes it possible to implement ATM switch with low price and high capacity. In this paper, we study the switch that uses EFCI, ER and VS/VD(Virtual Source/Virtual Destination) with rate-based mechanism. Instead of using queue threshold, we propose a new algorithm which uses bandwidth threshold of input stage of switch, and manages efficiently ABR traffic with EPRCA algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1393-1398
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• 2003

In this paper, we propose a new switch architecture with one schedule at k-time slots, which k means the allocated time slots for each schedule. A conventional switch system uses a single time slot per each schedule but the proposed switch system uses multiple time slots per each schedule. Both the conventional switch md the proposed switch have same throughput but our switch system occupies multiple cell time slots per each schedule and hence can be implemented in scheduler of simple circuitry compared to the conventional switch. The proposed scheduling method for switch system will be applicable in switch system with high-speed data link rate.

• Proceedings of the Korea Society for Simulation Conference
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• 1999.04a
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• pp.1-5
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• 1999

An ATM switch is the basic component of an ATM network, and its functioning is to switch incoming cells arriving at an input port to the output port associated with an appropriate virtual path. In case of an ATM switch with buffer sharing scheme, the performance analysis is very difficult due to the interactions between the address queues. In this paper, the influences of the degree of traffic burstiness and some traffic routing properties are investigated by using the simulation. Also, some cell access strategies including priority access and cell dropping are compared in terms of cell loss probability.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1A
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• pp.114-121
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• 2000

The problem of an input-buffered switch is the HOL(head-of-line) blocking which limits the maximum throughput but it is easy to implement in hardware. However, HOL blocking can be eliminated using aVOQ(virtual-output-queueing) technique. 0 this paper, we propose a new cell-scheduling algorithm for aninput-buffered ATM switch. The proposed algorithm, called PPIM(Probabilistic Parallel Iterative Matching), imposesa weight to every request based on the reserved bandwidth. It is shown that the input-buffered ATM switch withthe proposed PPIM algorithm not only provides high throughput and low delay but it also reduces the jitter,compared with the existing WPIM(Weighted PIM).

• Proceedings of the Korea Information Processing Society Conference
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• 2001.10b
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• pp.1533-1536
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• 2001

This paper considers the TMN system for management of public ATM switching network which has the four-level hierarchical structure consisting of one network management system, a few element management system and several agent-ATM switch pairs, respectively. The effects of one TMN command on the local call processing performance of the component ATM switch an analyzed using Jackson's queueing model. The TMN command considered is the permanent virtual call connection, and the performance measures of ATM switch are the utilization, mean queue length and mean waiting time for the processor interfacing the subscriber lines and trunks directly, and the call setup delay of the ATM switch.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.4
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• pp.10-19
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• 1998

With the advent of high-speed networks, the increasingly stringent performance requeirements are being placed on the underlying switching systems. Under these circumstances, simulation methods for evaluating the performace of such a switch requires vast computational cost and accordingly the importance of anlytical methods increases. In general, the performance analysis of a switch architecture is also a very difficult task in that the conventional queueing system such as switching systems, which consists of a large numbe of queues which interact with each other in a fiarly complicated manner. To overcome these difficulties, most of the past research results assumed that multiple queues become decoupled as the switch size grows unboundely large, which enables the conventional queueing theory to be applied. In this apepr, w analyze a non-blocking space-division ATM swtich with input queueing, and prove analytically the pheonomenon that virtual queues formed by the head-of-line cells become decoupled as the switch size grows unboundedly large. We also establish various properties of the limiting queue size processes so obtained and compute the maximum throughput associated with ATM switches with input queueing.

• Journal of Information Processing Systems
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• v.16 no.2
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• pp.460-477
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• 2020

As one of the most significant challenges in the virtual data center, the virtual data center embedding has attracted extensive attention from researchers. The existing research works mainly focus on how to design algorithms to increase operating revenue. However, they ignore the energy consumption issue of the physical data center in virtual data center embedding. In this paper, we focus on studying the energy-aware virtual data center embedding problem. Specifically, we first propose an energy consumption model. It includes the energy consumption models of the virtual machine node and the virtual switch node, aiming to quantitatively measure the energy consumption in virtual data center embedding. Based on such a model, we propose two algorithms regarding virtual data center embedding: one is heuristic, and the other is based on particle swarm optimization. The second algorithm provides a better solution to virtual data center embedding by leveraging the evolution process of particle swarm optimization. Finally, experiment results show that our proposed algorithms can effectively save energy while guaranteeing the embedding success rate.