• Title/Summary/Keyword: very low bit rate

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Efficient Harmonic-CELP Based Low Bit Rate Speech Coder (효율적인 하모닉-CELP 구조를 갖는 저 전송률 음성 부호화기)

  • 최용수;김경민;윤대희
    • The Journal of the Acoustical Society of Korea
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    • v.20 no.5
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    • pp.35-47
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    • 2001
  • This paper describes an efficient harmonic-CELP speech coder by taking advantages of harmonic and CELP coders into account. According to frame voicing decision, the proposed harmonic-CELP coder adopts the RP-VSELP coder as a fast CELP in case of an unvoiced frame, or an improved harmonic coder in case of a voiced frame. The proposed coder has main features as follows: simple pitch detection, fast harmonic estimation, variable dimension harmonic vector quantization, perceptual weighting reflecting frequency resolution, fast harmonic synthesis, naturalness control using band voicing, and multi-mode. These features make the proposed coder require very low complexity, compared with HVXC coder To demonstrate the performance of the proposed coder, a 2.4 kbps coder has been implemented and compared with reference coders. From results of informal listening tests, the proposed coder showed good quality while requiring low delay and complexity.

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A New Decision-Directed Carrier Recovery Algorithm (새로운 결정지향 반송파 복원 알고리즘)

  • 고성찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.7A
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    • pp.1028-1035
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    • 1999
  • To increase the throughput of data transmission in burst-mode TDMA communication systems and also to get a good BER performance at the same time, it is essential to rapidly acquire the carrier while keeping the desirable tracking performance. To achieve this goal, in this paper, a new decision-directed carrier recovery algorithm is presented. The proposed scheme does not incorporate the PLL and suppress the Gaussian random process of input noise by the pre-stage low pass filter so as to get both the fast acquisition and a good performance. Through computer simulations, the performance of the scheme is analyzed with respect to the acquisition time and bit error rate. The cycle slip in the proposed scheme is seldom observed at very low SNR environment in contrast to the previous proposed one. Because of this merit, it is not required to do the differential encoding and decoding in the proposed scheme.

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Image Enhancement Techniques for MPEG-4 (MPEG-4 영상의 화질 개선에 관한 연구)

  • 김태근;신정호;백준기
    • Journal of Broadcast Engineering
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    • v.2 no.2
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    • pp.169-181
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    • 1997
  • In this paper, we propose and discuss about image enhancement techniques for MPEG-4. which represents very low bit-rate, content-based. and object-based hierarchical audio-visual coding standard. The proposed enhancement technique removes undesired artifacts arising in the compression procedure and increase resolution in both spatial and temporal domains. In order to remove undesired artifacts. we divide the MPEG-4 video algorithm in two parts: MPEG-2 like part and the new part. For removing artifacts caused by the first part. we adopt the conventional blocking artifacts algorithm developed for MPEG-2. On the other hand for removing artifacts caused by the second part. we provide a new degradation model. and propose the corresponding image restoration method. For increasing resolution of the MPEG-4 images, we propose a general framework of multichannel image interpolation process. which includes both spatial and temporal interpolations. As the MPEG-4 standard is under development. various sophisticated techniques are considered. but research on image enhancement techniques is relatively underestimated. By this reason. additional image enhancement techniques will become very important issue in realization phase of MPEG-4.

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Research on Digital Complex-Correlator of Synthetic Aperture Radiometer: theory and simulation result

  • Jingye, Yan;Ji, Wu;Yunhua, Zhang;Jiang, Changhong;Tao, Wang;Jianhua, Ren;Jingshan, Jiang
    • Proceedings of the KSRS Conference
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    • 2002.10a
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    • pp.587-592
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    • 2002
  • A new digital correlator fur an airborne synthetic aperture radiometer was designed in order to replace the conventional analog correlator unit which will become very complicated while the number of channels is increasing. The digital correlator uses digital IQ demodulator instead of the intermediate frequency (IF) phase shifter to make the correlation processing performed digitally at base band instead of analogly at IF. This technique has been applied to the digital receiver in softradio. The down-converted IF signals from each pair of receiver channels become low rate base-band digital signals after under-sampled, Digitally Down-Converted (DDC), decimated and filtered by FIR filters. The digital signals are further processed by two digital multipliers (complex correlation), the products are integrated by the integrators and finally the outputs from the integrators compose of the real part and the imaginary part of a sample of the visibility function. This design is tested by comparing the results from digital correlators and that from analog correlators. They are agreed with each other very well. Due to the fact that the digital correlators are realized with the help of Analog-Digital Converter (ADC) chips and the FPGA technology, the realized volume, mass, power consumption and complexity turned out to be greatly reduced compared with that of the analog correlators. Simulations show that the resolution of ADC has an influence on the synthesized antenna patterns, but this can be neglected if more than 2bit is used.

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Friction and Wear Properties of Fiber Reinforced Composite (섬유보강 복합재의 마찰 및 마모특성)

  • Ju, Hyeok-Jong;Choe, Don-Muk;O, In-Seok;Hong, Myeong-Ho
    • Korean Journal of Materials Research
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    • v.4 no.7
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    • pp.733-740
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    • 1994
  • Oxidized-PAN fiber reinforced composite(OFRP), carbon fiber reinforced composite(CFRP), aramid fiber reinforced composite(AFRP), and glass fiber reinforced composite(GFRP) were fabricated with phenolic resin matrix by hot press molding. We tested the friction coefficient and wear rate varying with fiber weight fraction and observed the effect of fibers according to characteristics of individual reinforcement. When the amount of aramid fiber was 45wt%, average friction coefficient was maximum value of 0.353~0.383, where as, when the amount of pitch based carbon fiber was 45wt%, average friction coefficient was the lowest value of 0.164~0.190. The wear rate of AFRP and CFRP was low, but that of GFRP and OFRP increases drastically in the case of increasing of fiber weight fraction. Wear diagram of OFRP was unstable, but that of CFRP and AFRP was a bit stable. Through very unstable diagram of GFRP, we found that friction stability of GFRP was the lowest.

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Nonlinear Characteristics Evaluation of the FBMC and UFMC System for the 5G Mobile Communication (5세대 이동통신을 위한 FBMC와 UFMC 시스템의 비선형 특성 평가)

  • An, Changyoung;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.8
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    • pp.725-734
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    • 2016
  • Recently, novel candidate waveform techniques for spectral efficiency improvement was proposed in order to satisfy key performance indicators(KPIs) of 5th generation(5G) mobile communication. Multi-carrier based universal filtered multi-carrier(UFMC) and filter bank multi-carrier(FBMC) are very famous as 5G candidate waveform techniques. Also, weighted orthogonal frequency division multiplexing (W-OFDM) that has low-complexity is receiving the spotlight slowly. In this paper, firstly, we describe a basic OFDM system. And then, we also describe UFMC, FBMC, and W-OFDM system. Next, we evaluate and analyze spectrum and BER performance of these systems under the nonlinear high power amplifier(HPA) environment. As simulation results, spectrum characteristic and BER performance of UFMC, FBMC, and W-OFDM are similar to each other. Therefore, under the nonlinear HPA environment, W-OFDM system is more advantageous because W-OFDM system uses a simple time-domain windowing technique and has similar characteristics to the others.

Efficient Compression of MR Images Using Fractal Coding in Wavelet Transform Domain (웨이브릿 변환 영역에서의 프랙탈 부호화를 이용한 효율적 MR 영상 압축)

  • Bae S.H.;Yoon O.K.;Kim J.H.;Park C.H.;Lee S.K.;Park K.H.;Kim H.S.
    • Journal of Biomedical Engineering Research
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    • v.21 no.3 s.61
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    • pp.247-254
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    • 2000
  • We propose an efficient MR image compression technique using fractal coding in wavelet transform domain. In the Proposed method , we construct significant coefficient trees with the absolute values of discrete wavelet transform coefficients and then perform the fractal coding with the information of significant coefficients having high energy. For MR images, most Pixels including background have very low gray level values, the number of significant coefficients is small. so we can expect high compression rate. In addition. since this method uses the fractal coding in wavelet transform domain, blocking artifact is reduced prominently and edges sensitive to human visual system are well preserved. As a result of computer simulation, we obtained the reconstructed images with better quality than those by JPEG at the low bit rates below 0.33[bpp].

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A Study on The Design of China DSRC System SoC (중국형 DSRC 시스템 SoC 설계에 대한 연구)

  • Shin, Dae-Kyo;Choi, Jong-Chan;Lim, Ki-Taeg;Lee, Je-Hyun
    • 전자공학회논문지 IE
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    • v.46 no.4
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    • pp.1-7
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    • 2009
  • The final goal of ITS and ETC will be to improve the traffic efficiency and mobile safety without new road construction. DSRC system is emerging nowadays as a solution of them. China DSRC standard which was released in May 2007 has low bit rate, short message and simple MAC control. The DSRC system users want a long lifetime over 1 year with just one battery. In this paper, we propose the SoC of very low power consumption architecture. Several digital logic concept and analog power control logics were used for very low power consumption. The SoC operation mode and clock speed, operation voltage range, wakeup signal detector, analog comparator and Internal Voltage Regulator & External Power Switch were designed. We confirmed that the SoC power consumption is under 8.5mA@20Mhz, 0.9mA@1Mhz in active mode, and under 5uA in power down mode, by computer simulation. The design of SoC was finished on Aug. 2008, and fabricated on Nov. 2008 with $0.18{\mu}m$ CMOS process.

Topology of High Speed System Emulator and Its Software (초고속 시스템 에뮬레이터의 구조와 이를 위한 소프트웨어)

  • Kim, Nam-Do;Yang, Se-Yang
    • The KIPS Transactions:PartA
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    • v.8A no.4
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    • pp.479-488
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    • 2001
  • As the SoC designs complexity constantly increases, the simulation that uses their software models simply takes too much time. To solve this problem, FPGA-based logic emulators have been developed and commonly used in the industry. However, FPGA-based logic emulators are facing with the problems of which not only very low FPGA resource usage rate due to the very limited number of pins in FPGAs, but also the emulation speed getting slow drastically as the complexity of designs increases. In this paper, we proposed a new innovative emulation architecture and its software that has high FPGA resource usage rate and makes the emulation extremely fast. The proposed emulation system has merits to overcome the FPGA pin limitation by pipelined ring which transfers multiple logic signal through a single physical pin, and it also makes possible to use a high speed system clock through the intelligent ring topology. In this topology, not only all signal transfer channels among EPGAs are totally separated from user logic so that a high speed system clock can be used, but also the depth of combinational paths is kept swallow as much as possible. Both of these are contributed to achieve high speed emulation. For pipelined singnals transfer among FPGAs we adopt a few heuristic scheduling having low computation complexity. Experimental result with a 12 bit microcontroller has shown that high speed emulation possible even with these simple heuristic scheduling algorithms.

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Optical pulse parameter analysis of gain switched InGaAIP FP LD at 650 nm wavelegth and its characteristic in comparison with CW operation (이득스위칭을 이용한 650nm InGaAIP FP LD의 광펄스 파라메터 분석 및 CW 발진과의 특성비교)

  • 오광환;채정혜;이용탁;백운출;김덕영
    • Korean Journal of Optics and Photonics
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    • v.12 no.2
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    • pp.135-142
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    • 2001
  • Recently, plastic optical fiber draws a lot of attention as a new transmission medium for local area network (LAN) and home network applications. As PMMA based GI-POF (Graded Index Plastic Optical Fiber) has very low loss at about 500 nm and 650 nm wavelengths, it is very important to have a compact ultra short optical pulse source at these wavelength windows. In this paper, we have investigated detailed characteristics of gain switched laser system by using a commercially available low cost RF devices and an InGaAlP Fabry Perot semiconductor laser operating at 650 nm wavelength. The shortest optical 'pulse obtained was 33 psec with 1 GHz repetition rate. Depending on the DC bias current and the modulation frequency, the FWHM and the pulse energy of the gain switched pulses show 33.3-82.8 psec and 0.97-9.69 pI respectively. Also, the spectral bandwidths for CW and gain switched operations are 0.44 nm and 1.50 nm. We believe that these results are quite useful for high bit rate optical transmission applications with PMMA based plastic optical fibers in addition to estimate properties of ultra fast optical components and electro-optic devices. vices.

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