• Title, Summary, Keyword: vector graphics kernel

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Development of a Vector Graphics Kernel for Mobile Communication Terminals (모바일 통신 단말기를 위한 벡터 그래픽스 커널 개발)

  • Lee Hwan-Yong;Park Kee-Hyun;Woo Jong-Jung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.6
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    • pp.1011-1018
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    • 2006
  • Due to rapid development of mobile communication terminals and various requests of their users, multimedia information including image information has been the basis of mobile communication contents. In order to use vectored image information efficiently, which is more favorable than bit-mapped image information when transmission delay time and costs are considered, efficient vector graphics supporting systems are needed. Therefore, vector graphics kernel systems have been proposed and standardization attempts have been made in order to increase interoperability. In this paper, a vector graphics kernel based on OpenVG is designed and implemented. OpenVG was proposed as a standard vector graphics kernel by Khronos Group recently. The implemented vector graphics kernel, named by alexVG, is developed on a PC emulator as well as on a development board equipped with an ARM processor. In addition, performance tests are made in order to verify its functions.

GPU-Based ECC Decode Unit for Efficient Massive Data Reception Acceleration

  • Kwon, Jisu;Seok, Moon Gi;Park, Daejin
    • Journal of Information Processing Systems
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    • v.16 no.6
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    • pp.1359-1371
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    • 2020
  • In transmitting and receiving such a large amount of data, reliable data communication is crucial for normal operation of a device and to prevent abnormal operations caused by errors. Therefore, in this paper, it is assumed that an error correction code (ECC) that can detect and correct errors by itself is used in an environment where massive data is sequentially received. Because an embedded system has limited resources, such as a low-performance processor or a small memory, it requires efficient operation of applications. In this paper, we propose using an accelerated ECC-decoding technique with a graphics processing unit (GPU) built into the embedded system when receiving a large amount of data. In the matrix-vector multiplication that forms the Hamming code used as a function of the ECC operation, the matrix is expressed in compressed sparse row (CSR) format, and a sparse matrix-vector product is used. The multiplication operation is performed in the kernel of the GPU, and we also accelerate the Hamming code computation so that the ECC operation can be performed in parallel. The proposed technique is implemented with CUDA on a GPU-embedded target board, NVIDIA Jetson TX2, and compared with execution time of the CPU.