• ETRI Journal
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• v.36 no.3
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• pp.367-373
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• 2014

With high bandwidth, low interference, and low power consumption, optical network-on-chip (ONoC) has emerged as a highly efficient interconnection for the future generation of multicore system on chips. In this paper, we propose a new path-setup method for ONoC to mitigate contentions, such as packets, by recycling the setup packet halfway to the destination. A new, strictly non-blocking $6{\times}6$ optical router is designed to support the new method. The simulation results show the new path-setup method increases the throughput by 52.03%, 41.94%, and 36.47% under uniform, hotspot-I, and hotspot-II traffic patterns, respectively. The end-to-end delay performance is also improved.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.12
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• pp.110-119
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• 1996

A novel high speed VLSI architecture and its VLSI realization methodologies for a motion estimation processor based on full search block matching algorithm are presentd. The presented architecture is designed in order to be suitable for highly parallel and pipelined processing with identical PE's and adjustable in performance and hardware amount according to various application areas. Also, the throughput is maximized by enhancing PE utilization up to 100% and the chip pin count is reduced by reusing image data with embedded image memories. Also, the uniform and identical data processing structure of PE's eases VLSI implementation and the clock rate of external I/O data can be made slower compared to internal clock rate to resolve I/O bottleneck problem. The logic and spice simulation results of the proposed architecture are presented. The performances of the proposed architecture are evaluated and compared with other architectures. Finally, the chip layout is shown.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1108-1111
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• 2005

We propose an improved laser crystallization method based on a directional lateral growth technique. To assess the feasibility of this technique, we have developed an experimental prototype using a 351 nm XeF excimer laser and special optics to produce a long and extremely sharp, narrow beam without need for a photo type mask pattern. Using this system, we have demonstrated very uniform directional laterally grown poly-Si films without any grain boundary protrusions. We believe this method can meet the high performance and uniformity requirements needed for future TFTs in System On Panel (SOP) and OLED applications, as well as providing high process throughput for mass production.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.122-125
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• 1999

In this paper, we propose a new architecture of the Banyan switch for a high speed networking and the high speed parallel computer. The proposed switching network with a remodeled architecture is a newly modified Banyan network with eight input and output pots, respectively. We have analysed the maximum throughput of the revised switch. Our analyses has shown that under the uniform random traffic load, the FIFO discipline is limited to 70％. Therefore the result of the analyses shows that the results of the networking simulation with the new switch are feasible and if we adopt such as new architecture of the revised model of the Banyan switch, the hardware complexity can be reduced. The FIFO discipline has increased about 11% when we compare the switching system with the input buffer system. We have designed and verified the new switching system in VHDL.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.228-231
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• 1999

This paper describes the design and implementation of an application specific instruction-set processor developed for embedded DSP applications. The instruction-set has an uniform size of 16 bits, and supports 3 types of instructions: Primitive, Complex, and Specific. To reduce code size and cycle count we introduce complex instructions that can be selected according to the application under consideration, which leads to 50% code size reduction maximally. The processor has two independent data memories to double the data throughput and the address space. The processor is synthesized by 0.6$\mu$m single-poly double-metal technology. Critical path simulation shows that the maximum frequency is 110MHz and total gate count is 132, 000.

• IE interfaces
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• v.21 no.2
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• pp.189-197
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• 2008

This study shows achievable capacity gain from the MMR system. Relay stations are placed along the cell boundary in tiers. We can have as many tiers of relays and as many relays in each tier as we want. A model is developed, which can estimate the system capacity varying the number of relays in each tier and the bandwidths allocated to the BS and the RS. It is shown that maximum capacity increases are 21.5% and 18.9% when we have relays in the first tier only and in the first and the second tiers, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1032-1035
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• 2009

Several different production technologies for Low-Temperature Poly-Silicon (LTPS) have been proposed over the last years. However, finally the progress in Excimer-laser-based crystallization has lead to the best cost-to-performance ratio of LTPS manufacturing for use in active-matrix-based displays. In this paper, we report on recent and significant technical advances in light sources, optical beam deliveries and beam irradiation systems targeted at enabling ultra-uniform mura-free LTPS active-matrix backplanes while simultaneously lowering production costs and increasing throughput.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.3
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• pp.12-23
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• 1997

In this paper, we propose a new cell switch fabric for increasing the performance of ATM switching systems. Proposed switching network consists of a sorting network and a routing network. Both of these are multistage networks where each stage performs a fixed permutation on the incoming lines, and then routes them through a clumn of 2x2 switching elements. It is designed for distributing inputs and parallel processing to reduce the hardware complexity and obtain high performance of switching network. The structure and the operation of th eswitching network aredescribed and the performanceof the switching network is anlyzed under uniform traffic models. In this result, though the size of proposed network is increased the large scale, it has always the same throughput as the that of genral output queueing system with N=2. So, it is found that our proposed network is appropriate for the high apeed and lrger size of ATM switching systems.

• Journal of Information Display
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• v.12 no.2
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• pp.89-92
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• 2011

Advanced static DC magnetron sputtering methods based on the magnet wobbling technique were investigated to achieve highly uniform and homogeneous metallization layers. The novel split sputter mode (SSM) method, wherein the deposition process is divided into two distinct steps, enables the AKT rotary cathode technology to provide excellent layer properties, while keeping a high production throughput. The effectiveness of theSSMtechnique was demonstrated through copper-coated large-area substrates.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.12
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• pp.2539-2548
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• 2015

Overcoming inter-cell interference and spectrum scarcity are major issues in heterogeneous cellular networks. Static Frequency reuse schemes have been proposed as an effective way to manage the spectrum and reduce ICI(Inter cell Interference) in cellular networks. In a kind of static frequency reuse scheme, the allocations of transmission power and subcarriers in each cell are fixed prior to system deployment. This limits the potential performance of the static frequency reuse scheme. Also, most of dynamic frequency reuse schemes did not consider small cell and the network environment when the traffic load of each cell is heavy and non-uniform. In this paper, we propose an inter-cell resource allocation algorithm that dynamically optimizes subcarrier allocations for the multi-cell heterogeneous networks. The proposed dynamic frequency reuse scheme first finds the subcarrier usage in each cell-edge by using the exhaustive search and allocates subcarrier for all the cells except small cells. After that it allocates subcarrier for the small cell and then iteratively repeats the process. Proposed dynamic frequency reuse scheme performs better than previous frequency reuse schemes in terms of the throughput by improving the spectral efficiency due to it is able to adapt the network environment immediately when the traffic load of each cell is heavy and non-uniform.