• The Journal of the Korea institute of electronic communication sciences
• /
• v.16 no.6
• /
• pp.1095-1100
• /
• 2021

In this study, ITZO thin films were deposited on glass, sapphire, and PEN substrates by RF magnetron sputtering, and their electrical and optical properties were investigated. The resistivity of the ITZO thin film deposited on the glass and sapphire substrates was 3.08×10-4 and 3.21×10-4 Ω-cm, respectively, showing no significant difference, whereas the resistivity of the ITZO thin film deposited on the PEN substrate was 7.36×10-4 Ω-cm, which was a rather large value. Regardless of the type of substrate, there was no significant difference in the average transmittance of the ITZO thin film. Figure of Merits of the ITZO thin film deposited on the glass substrate obtained using the average transmittance in the absorption region of the amorphous silicon thin film solar cell and the absorption region of the P3HT : PCBM organic active layer were 10.52 and 9.28×10-3 Ω-1, respectively, which showed the best values. Through XRD and AFM measurements, it was confirmed that all ITZO thin films exhibited an amorphous structure and had no defects such as pinholes or cracks, regardless of the substrate type.

• The Journal of the Korea Contents Association
• /
• v.15 no.9
• /
• pp.21-28
• /
• 2015

In the semi-conductor process, a simulation process is performed to detect defects by analyzing the behavior of the impurity through the physical quantity calculation of the inner element. In order to perform the simulation, Finite-Difference Time-Domain(FDTD) algorithm is used. The improvement of semiconductor which is composed of nanoscale elements, the size of simulation is getting bigger. Problems that a processor such as CPU or GPU cannot perform the simulation due to the massive size of matrix or a computer consist of multiple processors cannot handle a massive FDTD may come up. For those problems, studies are performed with parallel/distributed computing. However, in the past, only single type of processor was used. In GPU's case, it performs fast, but at the same time, it has limited memory. On the other hand, in CPU, it performs slower than that of GPU. To solve the problem, we implemented a computing model that can handle any FDTD simulation regardless of size on the cluster which consist of heterogeneous processors. We tested the simulation on processors using MPI libraries which is based on 'point to point' communication and verified that it operates correctly regardless of the number of node and type. Also, we analyzed the performance by measuring the total execution time and specific time for the simulation on each test.

• Journal of the Society of Naval Architects of Korea
• /
• v.33 no.3
• /
• pp.35-47
• /
• 1996

A surface panel method treating a boundary-value problem of the Dirichlet type is presented to design a three dimensional body with free surface corresponding to a prescribed pressure distribution. An integral equation is derived from Green's theorem, giving a relation between total potential of known strength and the unknown local flux. Upon discretization, a system of linear simultaneous equations is formed including free surface boundary condition and is solved for an assumed geometry. The pseudo local flux, present due to the incorrect positioning of the assumed geometry, plays a role f the geometry corrector, with which the new geometry is computed for the next iteration. Sample designs for submerged spheroids and Wigley hull and carried out to demonstrate the stable convergence, the effectiveness and the robustness of the method. For the calculation of the wave resistance, normal dipoles and Rankine sources are distributed on the body surface and Rankine sources on the free surface. The free surface boundary condition is linearized with respect to the oncoming flow. Four-points upwind finite difference scheme is used to compute the free surface boundary condition. A hyperboloidal panel is adopted to represent the hull surface, which can compensate the defects of the low-order panel method. The design of a 5500TEU container carrier is performed with respect to reduction of the wave resistance. To reduce the wave resistance, calculated pressure on the hull surface is modified to have the lower fluctuation, and is applied as a Dirichlet type dynamic boundary condition on the hull surface. The designed hull form is verified to have the lower wave resistance than the initial one not only by computation but by experiment.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.4 no.1
• /
• pp.11-20
• /
• 1994

GaAs and AlGaAs epi-layers were grown on semi-insulating (100) GaAs substrate by molecular beam epitaxy (MBE) and their electrical and optical properties have been investigated by several measurements. In undoped GaAs, the p-type GaAs layers with the good surface morphology were obtained under the growth conditions of the substrate temperatures ranging from 570 to $585^{\circ}C$ and the $As_4$/Ga ratios from 17 to 22. In the samples with the growth rates of the ranges of $0.9~1.1 {\mu}m/h$, the impurity concentrations were in the ranges of $1.5{\times}10^{14}~5.6{\times}10^{14}cm^{-3}$ with the Hall mobilities of $590~410cm^2/V-s$. In the Si-doped GaAs, the n-type GaAs layers with low electro trap, only two hole deep levels were observed with uniform doping profiles (<1%). AlGaAs layers with good surface morphology and crystallinity were grown under an optimum condition of the substrate temperature, $600^{\circ}C $. 8 deep level defects were observed between 0.17~0.85eV in undoped AlGaAs layers.

• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.2
• /
• pp.43-48
• /
• 2017

Conductive $Sn_xO_y$ thin films were fabricated via RF reactive sputtering using SnO:Sn (80:20 mol%) composite target. The composite target was used to produce a chemically stable composition of $Sn_xO_y$ thin film while controlling structural defects by chemical reaction between tin and oxygen. During sputtering pressure, RF power, and substrate temperature were fixed, and oxygen partial pressure was varied from 0% to 12%. Annealing process was carried out at $300^{\circ}C$ for 1 hour in vacuum. Except $P_{O2}=0%$ sample, all samples showed the transmittance of 80~90% and amorphous phase before and after annealing. Electrically stable p-type $Sn_xO_y$ thin film with high transmittance was only obtained from the oxygen partial pressure at 12%. The carrier concentration and mobility for the $P_{O2}=12%$ were $6.36{\times}10^{18}cm^{-3}$ and $1.02cm^2V^{-1}s^{-1}$ respectively after annealing.

• Journal of Platform Technology
• /
• v.10 no.4
• /
• pp.3-10
• /
• 2022

In this study, damage resulting from internal flaws was investigated by finite element analysis for the safety evaluation of a non-destructive testing platform for hydrogen pressure vessels. A specimen was modeled and calculated using finite element analysis to determine material properties in accordance with the parameters of the composite material in order to assess the safety of the Type 4 hydrogen pressure vessel. Through this, flaws in the hydrogen pressure vessel were modeled, and test conditions were provided in accordance with rules to look into whether there was safety. Delamination, foreign object, and vertical cracks were modeled for internal flaws, and damage was examined in accordance with failure criteria. As the delamination defect approached the interior of the hydrogen pressure tank, it became more likely to cause damage. Additionally, as the crack depth grew in the case of vertical cracks, the likelihood of crack propagation rose. On the other hand, it was anticipated that the foreign item defect would suffer more damage from the outside in. A non-destructive testing platform will be used to assess the safety of fuel cell vehicles that are already in operation in future research.

• Korean Journal of Materials Research
• /
• v.10 no.1
• /
• pp.34-40
• /
• 2000

The $Pb_{0.94}Y_{0.04}[(Zr_{0.6}Sn_{0.4})_{0.915}Ti_{0.085}]O_3$ ceramics which corresponded to the antiferroelectric-ferroelectric phase boundary composition were prepared for digital-type-piezoelectric/electrostrictive device application. Their dielectric, field-induced polarization (P) and strain (X) behaviors were studied with variations in sintering condition and excess PbO content. The orthorhombic structure of specimens was hardly affected either by excess PbO addition or sintering temperature. With increasing excess PbO content, grains tended to be smaller and rounded ones, and the optimum sintering temperature was lowered. Excess PbO addition stabilized the antiferroelectric phase of the specimen effectively, which was confirmed by P-E and X-E analyses. Also the digital-type-strain character was found to be enhanced despite of slight increase in phase transition (AFE-FE) field and electrical resistivity, and decrease in maximum strain. These results were explained in terms of possible lattice defects and domain wall motion.

• Journal of the Microelectronics and Packaging Society
• /
• v.29 no.2
• /
• pp.49-52
• /
• 2022

As the difficulty of flip chip products increase, interest in stable PKG material technology from the viewpoint of reliability is increasing. Currently, the representative of poor reliability that are mainly occurring in flip chip PKG are Sn bridge and Cu dendrite. Two type defects are caused by void generated by the flux residue around the bump. In order to essentially minimize the risk of this type of reliability failure, the linkage between the composition of Molded Under-fill (MUF) and flux, which is related material, was reviewed. In this study, the correlation between base resin and filler, which is the main component of MUF, and flux, was defined, and the material composition design was carried out by refer to lesson learn. With the current material composition, it was confirmed that moisture absorption reliability 85%/85%/24hrs pass result and void did not occur during destructive analysis, and developed MUF has shown flux immunity improving result in flip Chip PKG. We think this study can be used in yield enhancement of flip chip process and give insights to study in compatibility between MUF and flux.

• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.4
• /
• pp.39-46
• /
• 2017

This paper presents the fabrication of ceramic insulation layer on metallic heat spreading substrate, i.e. an insulated metal substrate, for planar type heater. Aluminum alloy substrate is preferred as a heat spreading panel due to its high thermal conductivity, machinability and the light weight for the planar type heater which is used at the thermal treatment process of semiconductor device and display component manufacturing. An insulating layer made of ceramic dielectric film that is stable at high temperature has to be coated on the metallic substrate to form a heating element circuit. Two technical issues are raised at the forming of ceramic insulation layer on the metallic substrate; one is delamination and crack between metal and ceramic interface due to their large differences in thermal expansion coefficient, and the other is electrical breakdown due to intrinsic weakness in dielectric or structural defects. In this work, to overcome those problem, selected metal oxide buffer layers were introduced between metal and ceramic layer for mechanical matching, enhancing the adhesion strength, and multi-coating method was applied to improve the film quality and the dielectric breakdown property.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.17 no.9
• /
• pp.351-358
• /
• 2016

An Electrical Point Machine (NS:New-type Switch), which is equipped and operated at railways in Korea, has been used since the 1960s after being imported from Japan. On the other hand, although the mechanical configuration has improved the position motor control circuit, the electrical connection has not been improved, so NS may have a problem, such as the interlocking system of automatic train operation. In addition, NS is the most vulnerable part in the railway system and a huge train accident may occur due to minor defects. The existing NS wiring set of the circuit controller should be checked only if fixed. Therefore, an excessive inspection time only by a Railroad Signal expert is required. In this paper, the improvement of electrical connection in a NS wiring set, such as the position motor control circuit, was developed and the prototype was installed at Seoul Metro in the distance to go section. The results can be used to help make appropriate adjustments. The improvement of the NS wiring set enhance the maintenance efficiency, passenger service and the stability of the signal system as well as reducing the maintenance cost.