• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.963-972
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• 2002

An 8192-point pipelined FFT/IFFT processor core is designed, which can be used in multi-carrier modulation systems such as DUf-based VDSL modem and OFDM-based DVB system. In order to improve the signal-to-quantization-noise ratio (SQNR) of FFT/IFFT results, two-step convergent block floating-point (TS_CBFP) scaling is employed. Since the proposed TS_CBFP scaling does not require additional buffer memory, it reduces memory as much as about 80% when compared with conventional CBFP methods, resulting in area-and power-efficient implementation. The SQNR of about 60-㏈ is achieved with 10-bit input, 14-bit internal data and twiddle factors, and 16-bit output. The core synthesized using 0.25-$\mu\textrm{m}$ CMOS library has about 76,300 gates, 390K bits RAM, and twiddle factor ROM of 39K bits. Simulation results show that it can safely operate up to 50-㎒ clock frequency at 2.5-V supply, resulting that a 8192-point FFT/IFFT can be computed every 164-${\mu}\textrm{s}$. It was verified by Xilinx FPGA implementation.

• Journal of the Korean Institute of Rural Architecture
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• v.12 no.3
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• pp.35-46
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• 2010

The purpose of this study is to interpretate the Korean traditional Private Garden Pavilion -'byoul-seo(別墅)' in the view point of the architectural methodology - the separation of space in Honam province. It is presumed that nature union is archived through the 'yan-sang(玩賞)' which is ultimate state of knowledge that is base on the premises of opened signification in emancipation from narrow view point in the past and cognition of value. therefore, it is needed to know the unworldly point of space perception about the pavilion territory, furthermore to have conceptual method to distinct pavilion from the world. there are two methods in the distinct concept in this pavilion research: unworldly separation and meditative separation. As a result, the followings are conclusions; There two distinctive methods of planning of pavilion by use of the room and column. There are enclosement, turnaround, division of floor area in the room organization method, and it's modification of modulation, diversification of column height and diversification of column use in different space.

• Journal of Power Electronics
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• v.14 no.2
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• pp.315-323
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• 2014

An optimized space vector pulse width modulation (SVPWM) method with common mode voltage elimination and neutral point potential balancing is proposed for an open-end winding induction motor. The motor is fed from both of the ends with two neutral point clamped (NPC) three-level inverters. In order to eliminate the common mode voltage of the motor ends and balance the neutral point potential of the DC link, only zero common mode voltage vectors are used and a balancing control factor is gained from calculation in the strategy. In order to improve the harmonic characteristics of the output voltages and currents, the balancing control factor is regulated properly and the theoretical analysis is provided. Simulation and experimental results show that by adopting the proposed method, the common mode voltage can be completely eliminated, the neutral point potential can be accurately balanced and the harmonic performance for the output voltages and currents can be effectively improved.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.147-150
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• 2004

Maximum power point tracking for PV systems traditionally uses either perturbation and observation method or incremental conductance method. Both methods require modulation of the output voltage and this leads to significant power loss. In this paper, a method, which senses output circuit voltage and short circuit current and use the above two parameters for optimum control with a fuzzy controller, is introduced. The short circuit current of PV cell represents illumination, and the output circuit voltage carry on information about the temperature. PCS(power conditioning system) is controlled not only feed to inverter for stability voltage variation despite of variety external environment, but also operate in order to feeding voltage and current at maximum power point by boost type chopper.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.63-69
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• 1998

A new current controlled PWM technique with NPC structure is proposed in this paper. A current controlled PWM technique with neutral-point-clamped pulse-width modulation inverter composed of main switching devices which operates as switch for PWM and auxiliary switching devices to clamp the output terminal potential to the neutral point potential is described. The proposed current controller has a first and second current band. The switching pattern will be made by the first current band. According to the second current band, the output state of the switching pattern is changed into positive and negative state. This inverter output contains less harmonic content and lower switching frequency than that of conventional current controlled PWM technique at the same current limit. Two inverters are compared analytically and the performance is investigated by the computer simulation.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1504-1512
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• 2016

This paper presents a new single-phase asymmetrical cascaded multilevel DC-link inverter. The proposed inverter comprises two stages. The main stage of the inverter consists of multiple similar cells, each of which is a half-bridge inverter consisting of two switches and a single DC source. All cells are connected in a cascaded manner with a fixed neutral point. The DC source values are not made equal to increase the performance of the inverter. The second circuit is a folded cascaded H-bridge circuit operating at a line frequency. One of the main advantages of this proposed topology is that it is a modular type and can thus be extended to high stages without changing the configuration of the main stage circuit. Two control schemes, namely, low switching with selective harmonic elimination and sinusoidal pulse width modulation, are employed to validate the proposed topology. The detailed approach of each control scheme and switching pulses are discussed in detail. A 150W prototype of the proposed system is implemented in the laboratory to verify the validity of the proposed topology.

• Journal of Power Electronics
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• v.12 no.2
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• pp.285-293
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• 2012

Multilevel inverters have gained attention in high-power applications due to their numerous advantages in comparison with conventional two-level inverters. In this paper a simplified Space-Vector Modulation (SVM) algorithm for a three-level Neutral-Point Clamped (NPC) inverter is implemented on a Freescale$^{(R)}$ DSP56F8037. The algorithm is based on a simplification of the space-vector diagram for a three-level inverter so that it can be used with a two-level inverter. Once the simplification has been achieved, calculation of the dwell times and the switching sequences are carried out in the same way as for the two-level SVM method. Details of the hardware design are included. Experimental results are analyzed to validate the performance of the simplified algorithm.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1725-1734
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• 2016

This paper presents a novel seven-level (7L) voltage source converter for high-power medium-voltage applications. The proposed topology is an H-bridge connection of two nested neutral-point clamped (NNPC) converters and is referred to as an HNNPC converter. This converter exhibits advantageous features, such as operating over a wide range of output voltages, particularly for 10-15 kV applications, without the need to connect power semiconductors in series; high-quality output voltage; and fewer components relative to other classic seven-level topologies. A novel sinusoidal pulse width modulation technique is also developed for the proposed 7L-HNNPC converter to control flying capacitor voltages. One of the main features of the control strategy is the independent application of control to each arm of the converter to significantly reduce the complexity of the controller. The performance of the proposed converter is studied under different operating conditions via MATLAB/Simulink simulation, and its feasibility is evaluated experimentally on a scaled-down prototype converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.2 no.3
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• pp.51-57
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• 1997

A new current controlled PWM technique with N.P.C structure is proposed in this paper. A current controlled PWM technique with neutral-point-clamped pulsewidth modulation inverter composed of main switching devices which operates as switches for PWM and auxiliary switching devices to clamp the output terminal potential to the neutral point potential is described. This inverter output contains less harmonic content as compared with that of a conventional current controlled PWM type. In addition, the proposed current controlled PWM technique has lower switching frequency than that of conventional current controlled PWM technique at the same current limit. Two inverters are compared analytically. The improved voltage waveform of current controlled PWM with N.P.C structure is analyzed and the performance is investigated by the computer simulation.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.55 no.7
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• pp.335-343
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• 2006

We have designed the system that measure one channel ECG by two electrode and extract real-time EDR with more related resipiration and comportable to subject by using conductive textile. On the assumption that relation between RL electrode and potential measurement electrode is coupled with RC connected model, we designed RL drive output to feedback two electrode for reduction of common mode signal. The conductive textile which was used for two ECG electrode was offered more comfort during night sleep in bed than any other method using attachments. In the method of single-lead EDR, R wave point or QRS interval area could be used for EDR estimation in traditional method, it is, so to speak, the amplitude modulation(AM) method for EDR. Alternatively, R-R interval could be used for frequency modulation(FM) method based on Respiratory Sinus Arrhythmia(RSA). For evaluation of performance on AM EDR and FM EDR from 14 subject, ECG lead III was measured. Each EDR was compared with both temperature around nose(direct measurement of respiration) and respiration signal from thoracic belt(indirect measurement of respiration) on mean squared error(MSE), cross correlation(Xcorr), and Coherence. The upsampling interpolation technique of multirate signal processing is applied to interpolating data instead of cubic spline interpolation. As a result, we showed the real-time EDR extraction processing to be implemented at micro-controller.