• 수산해양기술연구
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• 제21권1호
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• pp.75-81
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• 1985

직교이방향 이층 유리섬유 강화 Epoxy 수지를 사용하여 인장축에 대해 섬유방향이 0$^{\circ}$, 15$^{\circ}$, 25$^{\circ}$ 및 45$^{\circ}$인 시료로 인장시험 및 전기절연 강도시험을 통하여 얻은 결과는 다음과 같다. 1) 섬유방향이 인장축에 대해 0$^{\circ}$에서 45$^{\circ}$로 증가함에 따라 항복응력 및 파단응력은 감소하는 경향이고 특히 0$^{\circ}$와 15$^{\circ}$ 사이에서 급격한 변화율을 보인다. 2) 파단시 변화율은 인장방향에 대한 섬유방향이 45$^{\circ}$인 경우 최대치를 나타냈고 15$^{\circ}$~45$^{\circ}$ 범위에서 급격한 변화율을 보인다. 3)섬유의 방향이 동일할 경우 인장력을 많이 받은 시료일수록 최대절연강도 값은 낮아졌고 인장방향과 섬유방향의 교각이 증가할수록 최대절연강도 값을 나타내는 압축응력의 값은 낮은 점으로 이동하는 경향을 보였다. 4) 기계적 특성과 같이 섬유방향이 45$^{\circ}$인 경우의 시료가 가장 나쁜 전기적 절연강도 특성을 나타냈다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.470-470
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• 2013

Recently, active materials such as amorphous silicon (a-Si), poly crystalline silicon (poly-Si), transition metal oxide semiconductors (TMO), and organic semiconductors have been demonstrated for flexible electronics. In order to apply flexible devices on the polymer substrates, all layers should require the characteristic of flexibility as well as the low temperature process. Especially, pentacene thin film transistors (TFTs) have been investigated for probable use in low-cost, large-area, flexible electronic applications such as radio frequency identification (RFID) tags, smart cards, display backplane driver circuits, and sensors. Since pentacene TFTs were studied, their electrical characteristics with varying single variable such as strain, humidity, and temperature have been reported by various groups, which must preferentially be performed in the flexible electronics. For example, the channel mobility of pentacene organic TFTs mainly led to change in device performance under mechanical deformation. While some electrical characteristics like carrier mobility and concentration of organic TFTs were significantly changed at the different temperature. However, there is no study concerning multivariable. Devices actually worked in many different kinds of the environment such as thermal, light, mechanical bending, humidity and various gases. For commercialization, not fewer than two variables of mechanism analysis have to be investigated. Analyzing the phenomenon of shifted characteristics under the change of multivariable may be able to be the importance with developing improved dielectric and encapsulation layer materials. In this study, we have fabricated flexible pentacene TFTs on polymer substrates and observed electrical characteristics of pentacene TFTs exposed to tensile and compressive strains at the different values of temperature like room temperature (RT), 40, 50, $60^{\circ}C$. Effects of bending and heating on the device performance of pentacene TFT will be discussed in detail.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.1202-1203
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• 2015

This paper describes the development of HVDC ${\pm}500kV$ polypropylene laminated paper (PPLP) mass-impregnated (MI) type cable system for HVDC transmission lines. As you know, mass-impregnated type cable generally has only insulating layer with the Kraft paper impregnated with a high-viscosity insulating compound. But polypropylene laminated paper is made of a layer of extruded polypropylene (PP) film sandwiched between two layers of Kraft paper. Thanks to PP film and its combination with Kraft paper, PPLP has higher AC, Impulse (Imp.) and DC breakdown (BD) strengths as well as lower dielectric loss than conventional Kraft paper insulation. In addition, Kraft MI cable has a limitation for the maximum conductor temperature as $55^{\circ}C$ But this PPLP MI cable has higher maximum conductor temperature than that of Kraft MI cable due to advantage of oil drainage characteristics. It is the most economic type of cable for HVDC transmission. Also HVDC ${\pm}500kV$ PPLP MI cable system was developed including land joints and outdoor-terminations. In order to prove the mechanical and electrical performances, the type test was carried out according to CIGRE recommendations. A full scale cable system has been tested successfully. And additional load cycle and polarity reversal tests on the cable system showed a higher performance compared with a similar mass impregnated paper cable.

• 대한원격탐사학회지
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• 제26권1호
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• pp.21-27
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• 2010

본 논문에서는 기름이 유출된 바다 표면의 레이더 산란에 대한 수치해석적 연구를 보여준다. 우선, 풍속에 따라서 불규칙적인 거칠기를 갖는 바다 표면을 생성한 다음에, 유전율이 높은 거친 바닷물 표면 위에 유전율이 낮은 기름층을 두어 기름이 유출된 바다 표면을 생성한다. 서로 다른 표면 거칠기, 기름층의 두께와 유전율, 주파수, 편파, 입사각의 조합으로 이루어진 다양한 형태의 기름 유출 바다에 대한 레이더 후방산란계수를 모멘트 법(Method of Moments)/ 몬테카를로(Monte-Carlo) 방법을 이용하여 계산한다. 이 수치해석적 방법은 이론적인 산란 모델로 계산 가능한 간단한 구조에 대해서 이론 모델 결과와 비교함으로써 그 정확성을 검증한다. 이 수치해석적 방법으로 기름이 유출된 바다 표면에서의 후방산란계수의 감소를 분석하며, 이 분석 결과는 결과적으로 SAR 영상에서의 기름층의 발견 및 식별에 도움을 줄 것이다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.171.2-171.2
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• 2016

The 2-dimensiona electron gas (2DEG) layers have opened tremendous interests in the heterooxide interfaces formed between two insulating materials, especially between LaAlO3 and $SrTiO_3$. The 2DEG layers exhibit extremely high mobility and carrier concentrations along with metallic transport phenomena unlike the constituent oxide materials, i.e., $LaAlO_3$ and $SrTiO_3$. The current work inserted artificially the interfacial layer, $Sr_xCa_{1-x}TiO_3$ between $LaAlO_3$ and $SrTiO_3$, with the aim to controlling the 2-dimensional transports. The insertion of the additional materials affect significantly their corresponding electrical transports. Such features have been probed using DC and AC-based characterizations. In particular, impedance spectroscopy was employed as an AC-based characterization tool. Frequency-dependent impedance spectroscopy have been widely applied to a number of electroceramic materials, such as varistors, MLCCs, solid electrolytes, etc. Impedance spectroscopy provides powerful information on the materials system: i) the simultaneous measurement of conductivity and dielectric constants, ii) systematic identification of electrical origins among bulk-, grain boundary-, and electrode-based responses, and iii) the numerical estimation on the uniformity of the electrical origins. Impedance spectroscopy was applied to the $LaAlO_3/Sr_xCa_{1-x}TiO_3/SrTiO_3$ system, in order to understand the 2-dimensional transports in terms of the interfacial design concepts. The 2-dimensional conduction behavior system is analyzed with special emphasis on the underlying mechanisms. Such approach is discussed towards rational optimization of the 2-dimensional nanoelectronic devices.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.284-284
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• 2016

Topological insulator (TI) is a bulk-insulating material with topologically protected Dirac surface states in the band gap. In particular, $Bi_2Se_3$ attracted great attention as a model three-dimensional TI due to its simple electronic structure of the surface states in a relatively large band gap (~0.3 eV). However, experimental efforts using $Bi_2Se_3$ have been difficult due to the abundance of structural defects, which frequently results in the bulk conduction being dominant over the surface conduction in transport due to the bulk doping effects of the defect sites. One promising approach in avoiding this problem is to reduce the structural defects by heteroepitaxially grow $Bi_2Se_3$ on a substrate with a compatible lattice structure, while also preventing surface degradation by encapsulating the pristine interface between $Bi_2Se_3$ and the substrate in a clean growth environment. A particularly promising choice of substrate for the heteroepitaxial growth is hexagonal boron nitride (h-BN), which has the same two-dimensional (2D) van der Waals (vdW) layered structure and hexagonal lattice symmetry as $Bi_2Se_3$. Moreover, since h-BN is a dielectric insulator with a large bandgap energy of 5.97 eV and chemically inert surfaces, it is well suited as a substrate for high mobility electronic transport studies of vdW material systems. Here we report the heteroepitaxial growth and characterization of high quality topological insulator $Bi_2Se_3$ thin films prepared on h-BN layers. Especially, we used molecular beam epitaxy to achieve high quality TI thin films with extremely low defect concentrations and an ideal interface between the films and substrates. To optimize the morphology and microstructural quality of the films, a two-step growth was performed on h-BN layers transferred on transmission electron microscopy (TEM) compatible substrates. The resulting $Bi_2Se_3$ thin films were highly crystalline with atomically smooth terraces over a large area, and the $Bi_2Se_3$ and h-BN exhibited a clear heteroepitaxial relationship with an atomically abrupt and clean interface, as examined by high-resolution TEM. Magnetotransport characterizations revealed that this interface supports a high quality topological surface state devoid of bulk contribution, as evidenced by Hall, Shubnikov-de Haas, and weak anti-localization measurements. We believe that the experimental scheme demonstrated in this talk can serve as a promising method for the preparation of high quality TI thin films as well as many other heterostructures based on 2D vdW layered materials.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• 한국자기학회지
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• 제15권2호
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• pp.67-75
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• 2005

경량 전파흡수체 구현 방안의 하나로 저밀도(약 0.2g/cc) 중공미세구 표면에 수 ${\cal}um$ 두께의 Co 피막을 무전해 도금에 의해 코팅하고, 고주파 전자기 특성 및 전파흡수특성을 조사하였다. Co 도금은 활성화 처리와 도금공정 2단계 과정을 거쳐 시행되었다. 도금공정의 반복에 의해 두께 $2{\~}3\mu$m의 균일한 Co 피막을 얻을 수 있었다. 이 분말을 실리콘 고무와 혼합하여 복합체를 제조하고, 고주파 전자기 물성 및 전파흡수특성을 회로망 분석기로 측정하였다. Co 피막의 강자성 특성 및 전도 특성에 의해 높은 자기손실 및 유전상수를 얻을 수 있었다. 이와 같은 전자기적 특성에 의해 GHz 대역에서 우수한 전파흡수특성(두께 2.0$\~$2.5mm, 전파흡수능 20dB 이상)이 확인되었다. 특히 Co 도금 중공미세구의 밀도(0.84 g/cc)는 페라이트(5.0 g/cc)에 비해 약 1/6에 불과하기 때문에 경량 전파흡수체로서 응용가치가 매우 높음을 제시할 수 있었다.