• 제목/요약/키워드: two TFTs

검색결과 74건 처리시간 0.02초

A Study on the Fabrication and Structural Evaluation of AlN Thin Films

  • Han, Seung-Oh;Han, Chang-Suk
    • 열처리공학회지
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    • 제23권2호
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    • pp.69-74
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    • 2010
  • AlN thin films were deposited by using a two-facing-targets type sputtering system (TFTS), and their deposition characteristics, microstructure and texture were investigated. Total gas pressure was kept constant at 0.4 Pa and the partial pressures of nitrogen, $PN_2$ (($N_2$ pressure)/($Ar+N_2$ pressure)) varied from 0 to 0.4 Pa. The texture of the film cross-sections and surface morphology were observed by field emission scanning electron microscope (FE-SEM). The crystallographic orientation of the films were analyzed by X-ray diffraction (XRD). Deposition of AlN film depends on $N_2$ partial pressure. The best preferred oriented AlN thin films can be deposited at a nitrogen partial pressure of $PN_2$ = 0.52. As-deposited AlN films show preferred orientation and columnar structure, and the grAlN size of AlN films increases with increasing sputtering current.

A single-clock-driven gate driver using p-type, low-temperature polycrystalline silicon thin-film transistors

  • Kim, Kang-Nam;Kang, Jin-Seong;Ahn, Sung-Jin;Lee, Jae-Sic;Lee, Dong-Hoon;Kim, Chi-Woo;Kwon, Oh-Kyong
    • Journal of Information Display
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    • 제12권1호
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    • pp.61-67
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    • 2011
  • A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.

Low voltage stability of a-Si:H TFTs with $SiN_x$ dielectric films prepared by PECVD using Taguchi methods

  • Wu, Chuan-Yi;Sun, Kuo-Sheng;Cho, Shih-Chieh;Lin, Hong-Ming
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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    • pp.272-275
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    • 2005
  • The high stability of a-Si:H TFTs device is studied with different deposited conditions of $SiN_x$ films by PECVD. The process parameters of $N_2$, $NH_3$ gas flow rate, RF power, and pressure s of hydrogenated amorphous silicon nitride are taken into account and analyzed by Taguchi experimental design method. The $NH_3$ gas flow rate and RF power are two major factors on the average threshold voltage and the a-SiNx:H film's structure. The hydrogen contents in $SiN_x$ films were measured by FTIR using the related Si-H/N-H bonds ratio in $a-SiN_x:H$ films. After the 330,000 sec gate bias stress is applied, the threshold voltages ($V_th$) shift less than 10%. This result indicates that the highly stable a-Si:H TFTs device can be fabricated with optimum gate $SiN_x$ insulator.

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서로 다른 소스/드레인 전극물질을 이용한 비정질 In-Ga-Zn-O 박막트랜지스터 성능향상 (Performance Improvement of Amorphous In-Ga-Zn-O Thin-film Transistors Using Different Source/drain Electrode Materials)

  • 김승태;조원주
    • 한국전기전자재료학회논문지
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    • 제29권2호
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    • pp.69-74
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    • 2016
  • In this study, we proposed an a-IGZO (amorphous In-Ga-Zn-O) TFT (thin-film transistor) with off-planed source/drain structure. Furthermore, two different electrode materials (ITO and Ti) were applied to the source and drain contacts for performance improvement of a-IGZO TFTs. When the ITO with a large work-function and the Ti with a small work-function are applied to drain electrode and source contact, respectively, the electrical performances of a-IGZO TFTs were improved; an increased driving current, a decreased leakage current, a high on-off current ratio, and a reduced subthreshold swing. As a result of gate bias stress test at various temperatures, the off-planed S/D a-IGZO TFTs showed a degradation mechanism due to electron trapping and both devices with ITO-drain or Ti-drain electrode revealed an equivalent instability.

Highly stable amorphous indium.gallium.zinc-oxide thin-film transistor using an etch-stopper and a via-hole structure

  • Mativenga, M.;Choi, J.W.;Hur, J.H.;Kim, H.J.;Jang, Jin
    • Journal of Information Display
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    • 제12권1호
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    • pp.47-50
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    • 2011
  • Highly stable amorphous indium.gallium.zinc-oxide (a-IGZO) thin-film transistors (TFTs) were fabricated with an etchstopper and via-hole structure. The TFTs exhibited 40 $cm^2$/V s field-effect mobility and a 0.21 V/dec gate voltage swing. Gate-bias stress induced a negligible threshold voltage shift (${\Delta}V_{th}$) at room temperature. The excellent stability is attribute to the via-hole and etch-stopper structure, in which, the source/drain metal contacts the active a-IGZO layer through two via holes (one on each side), resulting in minimized damage to the a-IGZO layer during the plasma etching of the source/drain metal. The comparison of the effects of the DC and AC stress on the performance of the TFTs at $60^{\circ}C$ showed that there was a smaller ${\Delta}V_{th}$ in the AC stress compared with the DC stress for the same effective stress time, indicating that the trappin of the carriers at the active layer-gate insulator interface was the dominant degradation mechanism.

두 개의 트랜지스터로 구동되는 In-Plane Switching (IPS) 액정 디스플레이 (In-Plane Switching Liquid Crystal Display using Two Transistors)

  • 정준호;박지웅;김민수;하경수;이승희
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.308-309
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    • 2008
  • We have proposed a high performance liquid crystal display using two thin film transistors (TFTs) for the large size TFT-LCD desirably 42inch WXGA panel for TVs. The device generates stronger electric fields to reorient liquid crystals than that in the conventional IPS device because the voltages with opposite polarity with respect to the common electrode are applied to each finger-type electrode. As a result, the operation voltage of 2Tr-IPS mode can be decreased and the transmittance can be increased compared to conventional IPS device. Consequently, the 2Tr-IPS has all the advantages over conventional IPS from large size point of view.

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Leakage Current Reduction of Ni-MILC Poly-Si TFT Using Chemical Cleaning Method

  • Lee, Kwang-Jin;Kim, Doyeon;Choi, Duck-Kyun;Kim, Woo-Byoung
    • 한국재료학회지
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    • 제28권8호
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    • pp.440-444
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    • 2018
  • An effective cleaning method for Ni removal in Ni-induced lateral crystallization(Ni-MILC) poly-Si TFTs and their electrical properties are investigated. The HCN cleaning method is effective for removal of Ni on the crystallized Si surface, while the nitric acid treatment results decrease by almost two orders of magnitude in the Ni concentration due to effective removal of diffused Ni mainly in the poly-Si grain boundary regions. Using the HCN cleaning method after the nitric acid treatment, re-adsorbed Ni on the Si surfaces is effectively removed by the formation of Ni-cyanide complexions. After the cleaning process, important electrical properties are improved, e.g., the leakage current density from $9.43{\times}10^{-12}$ to $3.43{\times}10^{-12}$ A and the subthreshold swing values from 1.37 to 0.67 mV/dec.

이차원 소자 시뮬레이터를 이용한 비정질 실리콘 물성 파라메타에 관한 연구 (A Study on the Physical Parameters of Amorphous Silicon using a Two-Dimensional Device Simulator(TFT2DS))

  • 곽지훈;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1997년도 춘계학술대회 논문집
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    • pp.168-171
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    • 1997
  • TFT2DS was developed to provide the usefulness as an analytic and design tool. The static characteristics of a-Si:H TFTs demonstrated a good agreement between simulated and measured data. This paper shows that TFT2DS can optimize the physical parameters of a-Si:H through sensitivity simulations and compute the static characteristics of a-Si:H TFTs. Moreover, through the sensitivity study of the parameters, it is shown that the optimizations of both the physical parameters of a-Si:H and the parameters of a-Si:H deposition, which must be inter-related, might be possibl.

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Effect of the Hydrophobicity of Hybrid Gate Dielectrics on a ZnO Thin Film Transistor

  • Choi, Woon-Seop;Kim, Se-Hyun
    • Transactions on Electrical and Electronic Materials
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    • 제11권6호
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    • pp.257-260
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    • 2010
  • Zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were prepared by the use of injector type atomic layer deposition. Two hybrid gate oxide systems of different polarity polymers with silicon oxide were examined with the aim of improving the properties of the transistors. The mobility and threshold voltage of a ZnO TFT with a poly(4-dimethylsilyl styrene) (Si-PS)/silicon oxide hybrid gate dielectric had values of 0.41 $cm^2/Vs$ and 24.4 V, and for polyimide/silicon oxide these values were 0.41 $cm^2/Vs$ and 24.4 V, respectively. The good hysteresis property was obtained with the dielectric of hydrophobicity. The solid output saturation behavior of ZnO TFTs was demonstrated with a $10^6$ on-off ratio.

다결정질 Si TFT-LCD에서의 Flicker에 대한 Simulation 연구 (A Simulation Study on the Flicker Analysis for the Poly-Silicon TFT-LCD)

  • 손명식;송민수;유건호;허지호;경희대학교물리학과;경희대학교물리학과
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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    • pp.225-228
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    • 2001
  • We simulated and analyzed the flicker phenomena in the poly-Si TFT-LCD using PSpice for the development of wide-area and high-quality LCD display We define the electric quantity of flicker in the TFT-LCD, which is the ratio of half frame frequency (30Hz) to DC (0 Hz) frequency. We compared two different types of TFTs, excimer laser annealed (ELA) poly-Si TFT and silicide mediated crystallization (SMC) poly-Si TFT, and found that the ELA and SMC TFTs show different flicker characteristics because of their mobility and leakage current. In addition, we showed that the gate voltage should be chosen carefully at the minimum flicker because of the larger leakage current of poly-Si Tn as compared with a-Si TFT

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