• Title/Summary/Keyword: turbo decoder

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High Throughput Turbo Decoding Scheme (높은 처리율을 갖는 고속 터보 복호 기법)

  • Choi, Jae-Sung;Shin, Joon-Young;Lee, Jeong-Woo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.48 no.7
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    • pp.9-16
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    • 2011
  • In this paper, various kinds of high throughput turbo decoding schemes are introduced, and a new turbo decoding scheme using the advantages of each scheme is proposed. The proposed scheme uses the decoding structure of double flow scheme, sliding window scheme and shuffled turbo decoding scheme. Simulation results show that the proposed scheme offers a BER performance equivalent to those of existing turbo decoding schemes with less clock cycles. We also show that the required memory can be reduced by choosing proper size of sliding window. Consequently, we can design a high throughput turbo decoder requiring low power and low area.

High Speed Turbo Product Code Decoding Algorithm (고속 Turbo Product 부호 복호 알고리즘 및 구현에 관한 연구)

  • Choi Duk-Gun;Lee In-Ki;Jung Ji-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6C
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    • pp.442-449
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    • 2005
  • In this paper, we introduce three kinds of simplified high-speed decoding algorithms for turbo product decoder. First, A parallel decoder structure, the row and column decoders operate in parallel, is proposed. Second, HAD(Hard Decision Aided) algorithm is used for early-stopping algorithm. Lastly, P-Parallel TPC decoder is a parallel decoding scheme, processing P rows and P columns in parallel instead of decoding one by one as that in the original scheme.

Hardware implementation of a SOVA decoder for the 3GPP complied Turbo code (3GPP 규격의 터보 복호기 구현을 위한 SOVA 복호기의 하드웨어 구현)

  • 김주민;고태환;이원철;정덕진
    • Proceedings of the IEEK Conference
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    • 2001.06a
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    • pp.205-208
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    • 2001
  • According to the IMT-2000 specification of 3GPP(3rd Generation Partnership Project) and 3GPP2, Turbo codes is selected as a FEC(forward error correction) code for even higher reliable data communication. In 3GPP complied IMT-2000 system, channel coding under consideration is the selective use of convolutional coding and Turbo codes of 1/3 code rate with 4 constraint length. Suggesting a new path metric normalization method, we achieved a low complexity and high performance SOVA decoder for Turbo Codes, Further more, we analyze the decoding performance with respect to update depth and find out the optimal value of it by using computer simulation. Based on the simulation result, we designed a SOVA decoder using VHDL and implemented it into the Altera EPF10K100GC503FPGA.

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Design and Architecture of Low-Latency High-Speed Turbo Decoders

  • Jung, Ji-Won;Lee, In-Ki;Choi, Duk-Gun;Jeong, Jin-Hee;Kim, Ki-Man;Choi, Eun-A;Oh, Deock-Gil
    • ETRI Journal
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    • v.27 no.5
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    • pp.525-532
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    • 2005
  • In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de)interleaving and iterative decoding in a conventional maximum a posteriori turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is from the combination of the radix-4, center to top, parallel decoding, and early-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit error rate performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. To prove the latency reduction, we implemented the proposed scheme on a field-programmable gate array and compared its decoding speed with that of a conventional decoder. The results show an improvement of at least five fold for a single iteration of turbo decoding.

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A Study on Turbo Equalization for MIMO Systems Based on LDPC Codes (MIMO 시스템에서 LDPC 부호 기반의 터보등화 방식 연구)

  • Baek, Chang-Uk;Jung, Ji-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.5
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    • pp.504-511
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    • 2016
  • In this paper, MIMO system based on turbo equalization techniques which LDPC codes were outer code and space time trellis codes (STTC) were employed as an inner code are studied. LDPC decoder and STTC decoder are connected through the interleaving and de-interleaving that updates each other's information repeatedly. In conventional turbo equalization of MIMO system, BCJR decoder which decodes STTC coded bits required two-bit wise decoding processing. Therefore duo-binary turbo codes are optimal for MIMO system combined with STTC codes. However a LDPC decoder requires bit unit processing, because LDPC codes can't be applied to these system. Therefore this paper proposed turbo equalization for MIMO system based on LDPC codes combined with STTC codes. By the simulation results, we confirmed performance of proposed turbo equalization model was improved about 0.6dB than that of conventional LDPC codes.

Design of A Turbo-code Decoder for Speech Transmission in IMT-2000 (IMT-2000에서 음성 전송을 위한 터보 코드 복호기 설계)

  • 강태환;박성모
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.273-276
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    • 2000
  • Recently, Turbo code has been considered for channel coding in IMT-2000(International Mobile Telecommunication-2000) system, because it offers better error correcting capability than the traditional convolution/viterbi coding . In this paper, a turbo code decoder for speech transmission in IMT-2000 system with frame size 192 bits, constrait length K=3, generator polynomials G(5,7) and code rate R=1/3 is designed using SOVA(Soft Output Viterbi Algorithm) and block interleaver

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A Simple Efficient Stopping Criterion for Turbo Decoder

  • Kim, Young-Sup;Ra, Sung-Woong
    • ETRI Journal
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    • v.28 no.6
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    • pp.790-792
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    • 2006
  • The performance of a turbo decoder depends strongly on the number of iterations in its decoding process. It is necessary to stop the decoding process at an appropriate moment to alleviate the serious burden, in terms of both the computational speed and latency, part of which is associated with too many iterations. In this letter, we introduce a criterion for finding the opportune moment to stop the decoding process, called a hard decision aided criterion based on bit interleaved parity, which is known to have much simpler hardware logic, compared with other schemes, and does not lead to any significant performance degradation.

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Design of Variable Data Transfer Rate Asymmetric TDD System Using Turbo Decoder with Double Buffer Controller (이중 버퍼 제어기 구조의 터보 복호기를 사용한 전송률 가변 비대칭 TDD 시스템 설계)

  • Park, Byeung-Kwan;Kim, Mi-Rae;Kim, Hyo-Jong
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.47 no.2
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    • pp.161-168
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    • 2019
  • This paper proposes a variable data transfer asymmetric TDD(Time Division Duplex) system for small UAV(Unmanned Aerial Vehicle) data link system. In the proposed method, a turbo decoder with a double buffer controller is proposed to apply turbo decoder with long decoding time to asymmetric TDD system. The proposed method achieves variable data transfer rate and maximum data transfer rate. The advantage of the proposed method is demonstrated by its data transfer rate. The measured data transfer rate is more than 1.8 times than that of symmetric TDD system. In addition, PER(Packet Error Rate) performance is the same and data transfer rate is variable.

Adaptive Trellis-Coded 8PSK Using Symbol Transformation (심볼 변환을 이용한 적응형 8PSK 트렐리스 부호화 방식)

  • 정지원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.4C
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    • pp.448-453
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    • 2004
  • Conventional pragmatic TCMs need sector phase quantizer to apply Viterbi decoder which uses 3-bit soft decision. A symbol transformation applied to the incoming I-channel and Q-channel symbols allows to use Viterbi decoder without sector phase quantizer. We analyzed structure and performance of proposed decoder, and applied it to the turbo decoder. We know that the performance of proposed decoder is better than that of conventional decoder by 1 [㏈]because of increasing of Euclidean distance.

A Simplified Decoding Algorithm Using Symbol Transformation for Turbo Pragmatic Trellis-Coded Modulation

  • Choi, Eun-A;Oh, Deock-Gil;Jung, Ji-Won;Kim, Nae-Soo;Kim, Young-Wan
    • ETRI Journal
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    • v.27 no.2
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    • pp.223-226
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    • 2005
  • This paper presents the application of a turbo coding technique combined with a bandwidth efficient method known as trellis-coded modulation. A transformation applied to the incoming I-channel and Q-channel symbols allows the use of an off-the-shelf binary/quadrature phase shift keying (B/QPSK) turbo decoder without any modifications. A conventional turbo decoder then operates on transformed symbols to estimate the coded bits. The uncoded bits are decoded based on the estimated coded bits and locations of the received symbols.

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