• 제목/요약/키워드: transformer design

검색결과 903건 처리시간 0.021초

A Novel Hybrid Converter with Wide Range of Soft-Switching and No Circulating Current for On-Board Chargers of Electric Vehicles

  • Tran, Van-Long;Tran, Dai-Duong;Doan, Van-Tuan;Kim, Ki-Young;Choi, Woojin
    • Journal of Electrical Engineering and Technology
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    • 제13권1호
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    • pp.143-151
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    • 2018
  • In this paper, a novel hybrid configuration combining a phase-shift full-bridge (PSFB) and a half-bridge resonant LLC converter is proposed for the On-Board Charger of Electric Vehicles (EVs). In the proposed converter, the PSFB converter shares the lagging-leg switches with half-bridge resonant converter to achieve the wide ZVS range for the switches and to improve the efficiency. The output voltage is modulated by the effective-duty-cycle of the PSFB converter. The proposed converter employs an active reset circuit composed of an active switch and a diode for the transformer which makes it possible to achieve zero circulating current and the soft switching characteristic of the primary switches and rectifier diodes regardless of the load, thereby making the converter highly efficient and eliminating the reverse recovery problem of the diodes. In addition an optimal power sharing strategy is proposed to meet the specification of the charger and to optimize the efficiency of the converter. The operation principle the proposed converter and design considerations for high efficiency are presented. A 6.6 kW prototype converter is fabricated and tested to evaluate its performance at different conditions. The peak efficiency achieved with the proposed converter is 97.7%.

3,300V 1MVA H-브릿지 멀티레벨 인버터 개발 (Development of 3,300V 1MVA Multilevel Inverter using Series H-Bridge Cell)

  • 박영민;김연달;이현원;이세현;서광덕
    • 전력전자학회논문지
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    • 제8권6호
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    • pp.478-487
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    • 2003
  • 본 논문에서는 고압 대용량 전동기 구동용 멀티레벨 인버터의 종류 및 특징을 간략히 살펴보고, 특히 입출력 전력품질이 우수하고 전압별 시리즈화가 용이한 H-브릿지 멀티레벨 인버터의 구조적 특징 및 장점을 기술하였다. 연구 개발된 3,300V lMVA 용량의 Cascaded H-브릿지 멀티레벨 인버터의 구체적인 전력회로 구조 및 설계방법, 제어기 구성 그리고 PWM 기법을 제시하였다. 또한, 실용량의 시험을 통해 H-브릿지 멀티레벨 인버터는 출력 전압 Step이 여러 단계이고 dv/dt가 적으며 입력단 THD를 크게 낮출 수 있어 성능 면에서도 여타 방식보다 우수함을 입증하였다. 또한 생산적인 측면에서도 저압 소자를 사용하여 설계하므로 기존의 생산/시험 기술과 설비를 이용할 수 있어 매우 경제적이며 Power Cell 단위 결합 구조이므로 신뢰성 측면이나 보수/유지 측면에서도 유리하다는 결론을 얻었다.

낮은 변압기 턴비를 갖는 고승압.대전력용 3상 ZVS DC-DC컨버터 (Three-Phase ZVS DC-DC Converter with Low Transformer Turn Ratio for High Step-up and High Power Applications)

  • 김준근;박찬수;최세완;박가우
    • 전력전자학회논문지
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    • 제16권3호
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    • pp.242-249
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    • 2011
  • 제안하는 컨버터는 부스트 하프브리지-전압 더블러를 각각 병렬-직렬로 연결하여 출력전력 및 출력전압을 증대시키므로 고승압 대전력 응용에서 소자의 선정이 용이하다. 특히 고주파변압기 턴 비를 작게 할 수 있고 DC 오프셋이 제거되어 최적의 변압기 설계가 가능하며, 3개의 코아로 전력이 분배되어 Low Profile 및 열 분산에 유리하다. 제안하는 컨버터는 전 영역(0 ∼ 1)의 듀티 사용으로 스타트업 및 추가의 클램프회로가 필요 없으며 입력전압 변동이 큰 응용에 적합하다. 또한 넓은 듀티영역에서 스위치의 ZVS 턴온과 다이오드의 ZCS 턴온 턴오프가 성취되므로 고효율을 달성할 수 있다. 제안하는 컨버터를 5 kW급 시작품으로 검증하였다.

교류전기철도 불평형 전력 개선을 위한 전력보상장치 제어 (Power Compensator Control for Improving Unbalanced Power of AC Electric Railway)

  • 우제훈;조종민;이태훈;차한주
    • 전력전자학회논문지
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    • 제25권3호
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    • pp.213-218
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    • 2020
  • In this study, we propose a control algorithm to reduce the unbalanced characteristics of a three-phase system power caused by the unbalanced load of the AC electric railway. Then, we verify its performance through the design of a power compensator and experiments applying it. Like electric railway systems, a Scott transformer is applied, and the load and single-phase back-to-back converters are connected to the M-phase and T-phase outputs. The back-to-back converter monitors the difference in active power between the unbalanced loads in real-time and compensates for the power by using bidirectional characteristics. The active power is performed through PI control in the synchronous coordinate system, and DC link overall voltage and voltage balancing control are controlled jointly by M-phase and T-phase converters to improve the responsiveness of the system. To verify the performance of the proposed power compensation device, an experiment was performed under the condition that M-phase 5 kW and T-phase 1 kW unbalanced load. As a result of the experiment, the unbalance rate of the three-phase current after the operation of the power compensator decreases by 58.66% from 65.04% to 6.38%, and the excellent performance of the power compensator proposed in this study is verified.

LED Driver with TRIAC Dimming Control by Variable Switched Capacitance for Power Regulation

  • Lee, Eun-Soo;Sohn, Yeung-Hoon;Nguyen, Duy Tan;Cheon, Jun-Pil;Rim, Chun-Taek
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.555-566
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    • 2015
  • A TRIAC dimming LED driver that can control the brightness of LED arrays for a wide range of source voltage variations is proposed in this paper. Unlike conventional PWM LED drivers, the proposed LED driver adopts a TRIAC switch, which inherently guarantees zero current switching and has been proven to be quite reliable over its long lifetime. Unlike previous TRIAC type LED drivers, the proposed LED driver is composed of an LC input filter and a variable switched capacitance, which is modulated by the TRIAC turn-on timing. Thus, the LED power regulation and dimming control, which are done by a volume resistor in the same way as the conventional TRIAC dimmers, can be simultaneously performed by the TRIAC control circuit. Because the proposed LED driver has high efficiency and a long lifetime with a high power factor (PF) and low total harmonic distortion (THD) characteristics, it is quite adequate for industrial lighting applications such as streets, factories, parking garages, and emergency stairs. A simple step-down capacitive power supply circuit composed of passive components only is also proposed, which is quite useful for providing DC power from an AC source without a bulky and heavy transformer. A prototype 60 W LED driver was implemented by the proposed design procedure and verified by simulation and experimental results, where the efficiency, PF, and THD are 92%, 0.94, and 6.3%, respectively. The LED power variation is well mitigated to below ${\pm}2%$ for 190 V < $V_s$ < 250 V by using the proposed simple control circuit.

경부고속선 절연구간에서 KTX 운행중 모터블럭의 동작특성 분석 (Study on Analysis of Operating Characteristics of Motor Block While KTX is Moving at Neutral Section of Kyung-Bu High Speed Line)

  • 최창현;노영환
    • 전기학회논문지
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    • 제64권10호
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    • pp.1523-1527
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    • 2015
  • Traction power is supplied by three-phase alternating current of 154 kV power grid and electric trains are operated on single phase feeding system. It becomes important to use all the three phases equally and convert them into two-phase electric power (90 degree phase rotation) for traction supply. This is achieved by special transformer from the adjacent traction substation which is separated by a neutral section. Neutral section locations are in front of the substation and between the two substations. The first stage of the Seoul-Busan high-speed railway, design curve radius is larger than 7,000 m and the greatest slope is 25‰. The railway track conditions are evaluated as good enough to install a neutral section at the first stage, but a few factors of coasting operation of the train should be considered at the second stage of Seoul-Busan high-speed railway. The neutral section was located at Kim-cheon substation, which made some neutral section problems produced by the operating train, and the neutral section was moved about 1.5 km to the south toward Dong Dae-gu station due to the track operation condition. Some of the trains which stopped at the existing Kim-cheon Gu-mi station produced another motor block failure after moving the neutral section. In this paper, power quality, system performance and track condition, etc. are suggested to solve the problems.

BMS용 능동밸런싱 회로 소자 구동용 게이트 구동 칩 설계 (Design of a gate driver driving active balancing circuit for BMSs.)

  • 김영희;김홍주;하윤규;하판봉;백주원
    • 한국정보전자통신기술학회논문지
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    • 제11권6호
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    • pp.732-741
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    • 2018
  • 여러 배터리 셀을 직렬로 연결해서 사용하는 BMS에서 사용 가능 용량을 최대화시키기 위하여 각 셀의 전압을 같도록 맞춰주는 셀 밸런싱 기술이 필요하다. 다중 권선 변압기를 사용하는 능동 셀 밸런싱 회로에서 셀 간 직접적 (direct cell-to-cell)으로 에너지를 전달하는 밸런싱 회로는 PMOS 스위치와 NMOS 스위치를 구동하기 위한 게이트 구동 칩은 PMOS 스위치와 NMOS 스위치 개수 만큼 TLP2748 포토커플러(photocoupler)와 TLP2745 포토커플러가 필요하므로 원가가 증가하고 집적도가 떨어진다. 그래서 본 논문에서는 포토커플러를 사용하여 PMOS와 NMOS 스위칭소자를 구동하는 대신 70V BCD 공정기반의 PMOS 게이트 구동회로와 NMOS 게이트 구동회로, 스위칭 시간이 개선된 PMOS 게이트 구동회로와 NMOS 게이트 구동회로를 제안하였다. 스위칭 시간이 개선된 PMOS 게이트 구동 스위치의 ${\Delta}t$는 8.9ns이고, NMOS 게이트 구동 스위치의 ${\Delta}t$는 9.9ns로 양호한 결과를 얻었다.

낮은 정재파비와 삽입손실을 갖는 밀리미터파(Ka 밴드) 복합모드 탐색기용 2-축 도파관 로터리 조인트 설계 및 제작 (Design and Fabrication of a 2-Axis Waveguide Rotary Joint for a Millimeter-wave (Ka-Band) Multi-Mode Seeker with Low VSWR and Insertion Loss)

  • 송성찬;유성룡;임주현;정용인
    • 한국전자파학회논문지
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    • 제30권2호
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    • pp.173-176
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    • 2019
  • 본 논문에서는 밀리미터파 탐색기에 적용 가능한 Ka-대역 도파관 로터리조인트를 설계 및 제작하였다. 제안된 로터리 조인트는 낮은 정재파 비와 저손실 특성을 유지하며, 방위각과 고각 회전이 가능하도록 하는 두 개의 회전축으로 설계되어 있다. 또한 구형 도파관과 원형 도파관 사이에 전파 모드를 정합하기 위한 리지 도파관 형태의 모드 변환기와 ${\lambda}/4$ 길이의 초크 구조로 로터리 조인트를 설계하였다. 제작된 로터리 조인트의 성능은 회로망 분석기와 고출력 송신기를 이용하여 확인하였으며, 진동/충격 시험을 통해 신뢰성 검사를 수행하였다. 그 결과, 중심 주파수$(F_C){\pm}500MHz$의 대역에서 최대 정재파비 1.19 : 1 이하, 삽입손실 0.80 dB 이하의 우수한 특성을 갖는 것을 확인하였다.

딥러닝 의류 가상 합성 모델 연구: 가중치 공유 & 학습 최적화 기반 HR-VITON 기법 활용 (Virtual Fitting System Using Deep Learning Methodology: HR-VITON Based on Weight Sharing, Mixed Precison & Gradient Accumulation)

  • 이현상;오세환;하성호
    • 한국정보시스템학회지:정보시스템연구
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    • 제31권4호
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    • pp.145-160
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    • 2022
  • Purpose The purpose of this study is to develop a virtual try-on deep learning model that can efficiently learn front and back clothes images. It is expected that the application of virtual try-on clothing service in the fashion and textile industry field will be vitalization. Design/methodology/approach The data used in this study used 232,355 clothes and product images. The image data input to the model is divided into 5 categories: original clothing image and wearer image, clothing segmentation, wearer's body Densepose heatmap, wearer's clothing-agnosting. We advanced the HR-VITON model in the way of Mixed-Precison, Gradient Accumulation, and sharing model weights. Findings As a result of this study, we demonstrated that the weight-shared MP-GA HR-VITON model can efficiently learn front and back fashion images. As a result, this proposed model quantitatively improves the quality of the generated image compared to the existing technique, and natural fitting is possible in both front and back images. SSIM was 0.8385 and 0.9204 in CP-VTON and the proposed model, LPIPS 0.2133 and 0.0642, FID 74.5421 and 11.8463, and KID 0.064 and 0.006. Using the deep learning model of this study, it is possible to naturally fit one color clothes, but when there are complex pictures and logos as shown in <Figure 6>, an unnatural pattern occurred in the generated image. If it is advanced based on the transformer, this problem may also be improved.

GIS 스페이서 내장형 저전력 측정용 변압기의 설계 및 제작 (Design and Fabrication of an LPVT Embedded in a GIS Spacer)

  • 박성관;이경렬;김남훈;김철환;길경석
    • 한국전기전자재료학회논문지
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    • 제37권2호
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    • pp.175-181
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    • 2024
  • In electrical power substations, bulky iron-core potential transformers (PTs) are installed in a tank of gas-insulated switchgear (GIS) to measure system voltages. This paper proposed a low-power voltage transformer (LPVT) that can replace the conventional iron-core PTs in response to the demand for the digitalization of substations. The prototype LPVT consists of a capacitive voltage divider (CVD) which is embedded in a spacer and an impedance matching circuit using passive components. The CVD was fabricated with a flexible PCB to acquire enough insulation performance and withstand vibration and shock during operation. The performance of the LPVT was evaluated at 80%, 100%, and 120% of the rated voltage (38.1 kV) according to IEC 61869-11. An accuracy correction algorithm based on LabVIEW was applied to correct the voltage ratio and phase error. The corrected voltage ratio and phase error were +0.134% and +0.079 min., respectively, which satisfies the accuracy CL 0.2. In addition, the voltage ratio of LPVT was analyzed in ranges of -40~+40℃, and a temperature correction coefficient was applied to maintain the accuracy CL 0.2. By applying the LPVT proposed in this paper to the same rating GIS, it can be reduced the length per GIS bay by 11%, and the amount of SF6 by 5~7%.