• 한국자동차공학회논문집
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• 제11권3호
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• pp.177-183
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• 2003

Vibration analysis using component mode synthesis method was carried out to identify that to some extent each component contributed to the whole vibration of a powertrain consisting of several components. This analysis helped decide the component to be modified to reduce the powertrain weight, without degrading its current vibration characteristics. As a result, a cylinder block was chosen as a redesign object. Topology optimization analysis was performed to design the topology of the cylinder block whose flange connected with the transmission was chosen to be the design domain. After all, a new prototype of cylinder block was manufactured based on the analysis results for the verification experiment. It was confirmed from the analytical and experimental results that u optimally designed cylinder block had an advantage over the current one in the powertrain weight, with the powertrain vibration characteristics improved slightly.

• 한국전산구조공학회:학술대회논문집
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• 한국전산구조공학회 1999년도 봄 학술발표회 논문집
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• pp.110-120
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• 1999

Topology optimization is used for determining the best layout of structural components to achieve predetermined performance goals. In the present study, we consider that the objective function is to maximize the natural frequency of the structure for a designated mode and the constraint function is to constrain a total material usage. In this paper, using a topology optimization technique based on the homogenized material and the chessboard prevention strategy, we obtain the optimal layout and the reinforcement of an elastic structure. Several examples are presented to show the ability of the topology optimization technique used in this paper to deal with an optimal layout problem for a free vibration structure.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권2호
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• pp.276-279
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• 2015

This paper presents two 3-stage D-band stacked amplifiers developed in a $0.13-{\mu}m$ SiGe BiCMOS technology, employed to compare the conventional cascode topology and the common-base (CB)/CB stacked topology. AMP1 employs two cascode stages followed by a CB/CB stacked stage, while AMP2 is composed of three CB/CB stacked stages. AMP1 showed a 17.1 dB peak gain at 143.8 GHz and a saturation output power of -4.2 dBm, while AMP2 showed a 20.4 dB peak gain at 150.6 GHz and a saturation output power of -1.3 dBm. The respective power dissipation was 42.9 mW and 59.4 mW for the two amplifiers. The results show that CB/CB stacked topology is favored over cascode topology in terms of gain near 140 GHz.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2006년도 하계학술대회
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• pp.170-174
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• 2006

In this paper electromagnetic topology (EMT) is used to analyze the lumped components on printed circuit boards (PCBs). It is difficult to obtain desirable results about the electromagnetic coupling problems by using a numerical or an experimental method on complex systems. The EMT can be considered as a helpful method to the analysis of electromagnetic interference / electromagnetic compatibility (EMI/EMC) problems in the complex system. To verify the validity of this method, three types of the PCBs mounting a simple circuit are fabricated and experimented.

• International Journal of Fuzzy Logic and Intelligent Systems
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• 제5권2호
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• pp.108-113
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• 2005

This paper suggests a control method for an efficient topology/parameter evolution in a bond graph-based GP design framework that automatically synthesizes designs for multi-domain, lumped parameter dynamic systems. We adopt a hierarchical breeding control mechanism with fitness-level-dependent differences to obtain better balancing of topology/parameter search - biased toward topological changes at low fitness levels, and toward parameter changes at high fitness levels. As a testbed for this approach in bond graph synthesis, an eigenvalue assignment problem, which is to find bond graph models exhibiting minimal distance errors from target sets of eigenvalues, was tested and showed improved performance for various sets of eigenvalues.

• ETRI Journal
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• 제27권6호
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• pp.725-732
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• 2005

The reconfiguration management scheme changes a logical topology in response to changing traffic patterns in the higher layer of a network or the congestion level on the logical topology. In this paper, we formulate a reconfiguration scheme with a shared buffer-constrained cost model based on required quality-of-service (QoS) constraints, reconfiguration penalty cost, and buffer gain cost through traffic aggregation. The proposed scheme maximizes the derived expected reward-cost function as well as guarantees the required flow's QoS. Simulation results show that our reconfiguration scheme significantly outperforms the conventional one, while the required physical resources are limited.

• Journal of international Conference on Electrical Machines and Systems
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• 제1권3호
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• pp.354-359
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• 2012

A transformerless converter suitable for multiphase drive application is presented in this paper. The topology employs a cascaded H-bridge rectifier as the interface between the grid and multi inverters which drive the multiphase motor. Compared with the conventional structure, the new topology eliminates the input transformer and also has the advantages such as four quadrant operation, simple configuration, low cost, high efficiency, and so on. The control strategies for the grid-side cascade H-bridge rectifier and the motor-side inverter are studied accordingly. Based on the multi-rotational reference frame, modular control scheme is developed to regulate the multiphase drive system. Simulation results show the proper operation of the proposed topology and the corresponding control strategy.

• Journal of Power Electronics
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• 제13권1호
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• pp.51-58
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• 2013

This paper proposes the power conversion mechanism of a bailer-charge-transfer zero-current-switching (CT-ZCS) circuit. The operation modes are analyzed and researched using state trajectory equations. The topology of CT-ZCS based on soft-switching inverters offers some merits such as: tracking the input reference signal dynamically, bearing load shock and short circuit, multiplying inverter N+1 redundancy parallel, coordinating power balance for easy control, and soft-switching commutation for high efficiency and large capacity. These advantages are distinctive from conventional inverter topologies and are especially demanded in AC drives: new energy generation and grid, distributed generation systems, switching power amplifier, active power filter, and reactive power compensation and so on. Prototype is manufactured and experiment results show the feasibility and dynamic voltage-tracking characteristics of the topology.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2004년도 춘계학술대회
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• pp.468-473
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• 2004

New reliability-based topology optimization method is proposed by utilizing single-loop single vector approach, which approximate searching the most probable point in the probabilistic design domain analytically, to reduce the time cost and dealing with several constraints to handle practical design requirements. To examine uncertainties in the topology design of a structure, the modulus of elasticity of the material and applied loadings are considered as probabilistic design variables. The results of design examples show that the proposed method provides efficiency curtailing the time for the optimization process and accuracy satisfying the specified reliability.

• Journal of information and communication convergence engineering
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• 제19권4호
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• pp.205-213
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• 2021

The properties of a scale-free network are little known; its node degree following a power-law distribution is among its few known properties. By selecting real-field scale-free networks from a network dataset and comparing them to other networks, such as random and non-scale-free networks, the topology characteristics of scale-free networks are identified. The assortative coefficient is identified as a key metric of a scale-free network. It is also identified that most scale-free networks have negative assortative coefficients. Traditional generation models of scale-free networks are evaluated based on the identified topology characteristics. Most representative models, such as BA and Holme&Kim, are not effective in generating real-field scale-free networks. A link-rewiring method is suggested that can control the assortative coefficient while preserving the node degree sequence. Our analysis reveals that it is possible to effectively reproduce the assortative coefficients of real-field scale-free networks through link-rewiring.