• Title/Summary/Keyword: timing receiver

Search Result 251, Processing Time 0.023 seconds

A Design of RAKE Receiver for Cellular CDMA Communications (셀룰라 CDMA 이동통신용 레이크 수신기의 설계)

  • 정우진;한영열
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.19 no.3
    • /
    • pp.560-572
    • /
    • 1994
  • This paper describes a design of RAKE receiver for the cellular CDMA mobile communication system on the multipath fading channel. To measure impulse response on the multipath fading environment. partial correlation properties of short PN code that transmitted at a cell site through the pilot channel was used. We used 12 despread paths for compensating about 10 s multipath spread and proposed the compensation algorithm. For processing of digital converted input signal, we proposed full digitalized logics and its validity was verified by computer and timing simulation.

  • PDF

A Study on the Development of the Automatic Level Measurement System (자동 표고 측정 장치 개발에 관한 연구)

  • 김종안;김수현;곽윤근
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 1997.04a
    • /
    • pp.756-760
    • /
    • 1997
  • In this research, the automatic level measurement system used in land leveling was developed. By using a laser transmitter and a receiver as measuring equipments, level was measured automatically. The driving part of this system was composed of stepping motor, timing belt and pulley. It drived the laser receiver to track laser beam generated form the laser transmitter. The level measuring experiments were performed about three level change shapes (step, random, sine). This system could measure step level change of which amplitude was 40mm in 0.5s, random level change within .+-. mm, maximum measurement error. In case of sine level change, experiment was executed with varying the spatial frequency of level change. As a result, this system was able to measure sine level change of which spatial frequency was 0.5m $^{-1}$ accurately.

  • PDF

A CMOS Frequency Synthesizer for 5~6 GHz UNII-Band Sub-Harmonic Direct-Conversion Receiver

  • Jeong, Chan-Young;Yoo, Chang-Sik
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.9 no.3
    • /
    • pp.153-159
    • /
    • 2009
  • A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.

CHANNEL ANALYSIS SYSTEM FOR DTV RECEPTION SIGNAL

  • Suh, Young-Woo;Lee, Jae-Kwon;Mok, Ha-Kyun;Choi, Jin-Yong;Seo, Jong-Soo
    • Proceedings of the Korean Society of Broadcast Engineers Conference
    • /
    • 2009.01a
    • /
    • pp.337-340
    • /
    • 2009
  • In general, channel information of received DTV signal analyzed based on symbol timing clock with only In-phase information in DTV receiver. This paper presents technical requirements of channel analysis system for DTV reception signal. In order to meet such requirements and measure more accurate magnitude and phase of channel information, compensation method for the quadrature information from measured in-phase data is proposed. The proposed channel analysis system is implemented with a commercial DTV chipset and provides fast data analysis with good connectivity with field test vehicles. Computer simulation and laboratory test results are provided to figure out the performance of the proposed channel analysis system for DTV signal.

  • PDF

A Simple Encryption Technology for Space-Time Block Coding (시공간 블록 코딩에 적용가능한 간단한 암호화 기법)

  • Jung, Hyeok-Koo
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.23 no.5
    • /
    • pp.1-8
    • /
    • 2018
  • This paper proposes a simple encryption technology for space-time block coding algorithm. Space-time block coding algorithm uses two antennas in transmitting data which consists of original data and transformed data for the purpose of combining in the receiver. This kind of two transmission antenna data could be exchanged and transmitted on each other's antenna individually, which can be used as a simple encryption algorithm. Encryption timing control informations should be shared between transmitter and receiver beforehand. It is shown that the proposed architecture can give performance enhancement compared with no encryption cases.

A High-Speed Matched Filter for Searching Synchronization in DSSS Receiver (DSSS 수신기에서 동기탐색을 위한 고속 정합필터)

  • 송명렬
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.27 no.10C
    • /
    • pp.999-1007
    • /
    • 2002
  • In this paper, the operation of matched filter for searching initial synchronization in direct sequence spread spectrum receiver is studied. The implementation model of the matched filter by HDL (Hardware Description Language) is proposed. The model has an architecture based on parallelism and pipeline for fast processing, which includes circular buffer, multiplier, adder, and code look-up table. The performance of the model is analyzed and compared with the implementation by a conventional digital signal processor. It is implemented on a FPGA (Field Programmable Gate Array) and its operation is validated in a timing simulation result.

Optimal equivalent-time sampling for periodic complex signals with digital down-conversion

  • Kyung-Won Kim;Heon-Kook Kwon;Myung-Don Kim
    • ETRI Journal
    • /
    • v.46 no.2
    • /
    • pp.238-249
    • /
    • 2024
  • Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.

Synchronization performance optimization using adaptive bandwidth filter and average power controller over DTV system (DTV시스템에서 평균 파워 조절기와 추정 옵셋 변화율에 따른 대역폭 조절 필터를 이용한 동기 성능 최적화)

  • Nam, Wan-Ju;Lee, Sung-Jun;Sohn, Sung-Hwan;Kim, Jae-Moung
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.44 no.5
    • /
    • pp.45-53
    • /
    • 2007
  • To recover transmitted signal perfectly at DTV receiver, we have to acquire carrier frequency synchronization to compensate pilot signal which located in wrong position and rotated phase. Also, we need a symbol timing synchronization to compensate sampling timing error. Conventionally, to synchronize symbol timing, we use Gardner's scheme which used in multi-level signal. Gardner's scheme is well known for its sampling the timing error signal from every symbol and it makes easy to detect and keep timing sync in multi-path channel. In this paper, to discuss the problem when the received power level is out of range and we cannot get synchronization information. With this problem, we use 2 step procedures. First, we put a received signal power compensation block before Garder's timing error detector. Second, adaptive loop filter to get a fast synchronization information and averaging loop filter's output value to reduce the amount of jitter after synchronization in PLL(Phased Locked Loop) circuit which is used to get a carrier frequency synchronization and symbol timing synchronization. Using the averaging value, we can estimate offset. Based on offset changing ratio, we can adapt adaptive loop filter to carrier frequency and symbol timing synchronization circuit.

Alternate Time-Switched Space-Frequency Block Coding Technique for OFDM Systems

  • Jung, Hyeok Koo
    • Journal of electromagnetic engineering and science
    • /
    • v.12 no.4
    • /
    • pp.287-289
    • /
    • 2012
  • This paper proposes an alternate time-switched space-frequency block coding transmission technique for orthogonal frequency division modulation systems. There are two antennas in the transmitter but it still has only a baseband and RF and a switch that alternates between the antennas at every symbol timing. Alternating transmit symbols result in zeros that make maximal ratio receive combining possible in the receiver. Simulation results show that it provides better performance than the traditional algorithm at the expense of one additional antenna.

The Eye-Opening Conditions for the Minimum Bandwidth Signaling (최소대역폭 전송에서의 개안 조건)

  • Baek, Je-In
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.27 no.9
    • /
    • pp.1321-1326
    • /
    • 1990
  • In this paper, the eye-opening conditions are investigated for the minimum bandwidth digital transmission systems where the sinc functions is used as a basic pulse so that only the Nyquist bandwidth is required for the channel. In order for these systems to be tolerant to the timing jitter in the receiver, the eye pattern should be open horizontally. It is proved that an eye opening condition which has been understood only as a sufficiency becomes a necessity as well. As its result, having a spectral null at teh Nyquist frequency is shown to have the same meaning as eye opening.

  • PDF