• Title/Summary/Keyword: timing receiver

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Window based Symbol Timing Recovery (윈도우 기반 심벌 타이밍 복원)

  • Lee, Chul-Soo;Jang, Seung-Hyun;Jung, Eui-Suk;Kim, Byoung-Whi
    • Proceedings of the KIEE Conference
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    • 2005.10b
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    • pp.487-489
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    • 2005
  • This paper proposes a symbol timing recovery method that is simple in structure and can provide high speed symbol synchronization. Transmitter and receiver are not synchronized in communication systems using digital modulation. Receiver should search the timing variation of transmitter continuously. The proposed timing recovery method searches sample position by comparing previous sample value with next sample value. This method can be applied to digital and optical transceivers with high data rate.

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Design and Analysis of Switching Timing for High Power GPS Meaconing Jammer

  • Lee, Byung-Hyun;Oh, In-Geun;Kim, Sung-Il
    • Journal of Positioning, Navigation, and Timing
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    • v.7 no.4
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    • pp.227-233
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    • 2018
  • The purpose of satellite navigation meaconing jamming is to make the target GPS receiver calculate false navigation by meaconing the received satellite signals. At this time, since the received and transmitted signals have the same frequency, the back-lobe reduction level of antenna should be -160 dB when the Effective Radiated Power (ERP) is 1 Watt (30 dBm). Therefore, meaconing jamming is impossible by merely reducing the back-lobe level of antenna when the transmitter and receiver are in proximity to each other. In general, the transmitter and receiver are isolated by the time division method to eliminate such transmission/reception interference. This paper studied the optimal switching timing between transmitting and receiving when isolating the time division transmission and reception for GPS meaconing jamming.

Design of a Timing Estimator Algorithm for 2.45GHz LR-WPAM Receiver (2.45GHz LR-WPAN 수신기를 위한 Timing Estimator 알고리즘의 설계)

  • Kang Shin-Woo;Do Joo-Hyun;Park Tha-Joon;Choi Hyung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.3A
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    • pp.282-290
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    • 2006
  • In this paper, we propose an enhanced Timing Estimator algorithm for 2.45GHz LR-WPAN receiver. Because an expensive and highly efficient oscillator can't be used for low-cost implementation, a Timing Estimator algorithm having stable operation in the channel environment with center frequency tolerance of 80 ppm is required. To enhance the robustness to frequency offset and the stability of receiver performance, multiple delay differential filter is adopted. By utilizing the characteristic that the correlation result between the output signal of Multiple delay differential filter and reference signal is restricted on the In-phase part of the correlator output, a coherent detection scheme instead of the typical noncoherent one is adopted for Timing Estimator. The application of the coherent detection scheme is suitable for LR-WPAN receiver aimed at low-cost, low-power, and low-complexity, since it can remove performance degradation due to squaring loss of I/Q squaring operation and decrease implementation complexity. Computer simulation results show that the proposed algorithm achieved performance improvement compared with the differential detection-based noncoherent scheme by 2dB in average.

Digital Fine Timing Tracker for Correlation Detection Receiver in IR-UWB Communication System (IR-UWB 시스템에서 상관 검출 수신기를 위한 디지털 미세 타이밍 추적기)

  • Ko Seok-Jun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.9C
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    • pp.905-913
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    • 2006
  • In the impulse radio ultra-wideband communication systems, the residual timing offset exists when the acquisition and tracking of the timing synchronization is well done. And the offset affects the performance of the system dramatically. In order to compensate the offset, we present the digital phase-locked loop that uses the reference signal in the correlation detection receiver. First, we show the degradation of BER performance that is caused by the offset, and then compensation process of the timing tracker and performance improvement. In this paper, the timing detector in the tracker operates at the sampling period of frame level uses the correlation between received and reference signal. Also, we present the performance comparison by using the computer simulation results for different Gaussian monocycle pulses.

Estimation of the Relative GPS/Galileo Satellite and Receiver IFBs using a Kalman Filter in a Regional Receiver Network (지역적 수신기 네트워크에서 Kalman 필터를 사용한 상대적인 GPS/Galileo 위성 및 수신기 IFB 추정)

  • Heesung Kim;Minhyuk Son
    • Journal of Positioning, Navigation, and Timing
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    • v.13 no.3
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    • pp.309-317
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    • 2024
  • Satellite and receiver Inter-Frequency Biases (IFBs) should be estimated or calibrated by pre-defined values for generating precise navigation messages and augmentation data in satellite navigation systems or the augmentation system. In this paper, a Kalman filter is designed and implemented to estimate the ionospheric delay and satellite/receiver IFBs using a regional receiver network. First, an ionospheric model and its filter parameter is defined based on previous studies. Second, a measurement model for estimating the relative satellite/receiver IFBs without any constraints is proposed. Third, a procedure for ensuring the continuity of estimation is proposed in this paper. To verify the performance of the designed filter, six Continuously Operating Reference Stations (CORSs) are selected. Finally, the stability and accuracy of satellite/receiver IFB estimation are analyzed.

Design of burst receiver with symbol timing and carrier synchronization (심벌동기와 반송파동기를 가진 버스트 수신기의 설계)

  • 남옥우
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2001.11a
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    • pp.44-48
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    • 2001
  • In this paper we describe the design of symbol timing and carrier synchronization algorithms for burst receiver. The demodulator consists of digital down converter, matched filter and synchronization circuits. For symbol timing recovery we use modified Gardner algorithm. And we use decision directed method for carrier phase recovery. For the sake of performance analysis, we compare simulation results with the board implemented by FPGA which is APEX20KE series chip for Alter. The performance results show it works quite well up to the condition that a frequency offset equal to 0.1% of symbol rate.

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Ranging Performance for Spoofer Localization using Receiver Clock Offset

  • Lee, Byung-Hyun;Seo, Seong-Hun;Jee, Gyu-In;Yeom, Dong-Jin
    • Journal of Positioning, Navigation, and Timing
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    • v.5 no.3
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    • pp.137-144
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    • 2016
  • In this paper, the performance of ranging measurement, which is generated using two receiver clock offsets in one receiver, was analyzed. A spoofer transmits a counterfeited spoofing signal which is similar to the GPS signal with hostile purposes, so the same tracking technique can be applied to the spoofing signal. The multi-correlator can generate two receiver clock offsets in one receiver. The difference between these two clock offsets consists of the path length from the spoofer to the receiver and the delay of spoofer system. Thus, in this paper, the ranging measurement was evaluated by the spoofer localization performance based on the time-of-arrival (TOA) technique. The results of simulation and real-world experiments show that the position and the system clock offset of the spoofer could be estimated successfully.

Implementation and Experimental Test Result of a Multi-frequency and Multi-constellation GNSS Software Receiver Using Commercial API

  • Han, Jin-Su;Won, Jong-Hoon
    • Journal of Positioning, Navigation, and Timing
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    • v.8 no.1
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    • pp.1-12
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    • 2019
  • In this paper, we implement a navigation software of a Global Navigation Satellite System (GNSS) receiver based on a commercial purpose GNSS software receiver platform and verify its performance by performing experimental tests for various GNSS signals available in Korea region. The SX3, employed in this paper, is composed of an application program and a Radio Frequency (RF) frontend, and can capture and process multi-constellation and multi-frequency GNSS signals. All the signal processing procedure of SX3 is accessible by the receiver software designer. In particular for an easy research and development, the Application Programing Interface (API) of the SX3 has a flexible architecture to upgrade or change the existing software program, equipped with a real-time monitoring function to monitor all the API executions. Users can easily apply and experiment with the developed algorithms using a form of Dynamic Link Library (DLL) files. Thus, by utilizing this flexible architecture, the cost and effort to develop a GNSS receiver can be greatly reduced.

On the Selection of Burst Preamble Length for the Symbol Timing Estimate in the AWGN Channel

  • Lee, Seung-Hwan;Kim, Nam-il;Kim, Eung-Bae
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.2059-2062
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    • 2002
  • For detection of digitally modulated signals, the receiver must be provide with accurate carrier phase and symbol timing estimates. So far, tots of algorithms have been suggested for those purposes. In general, a interpolation filter with TED(Timing Error Detection) like Gardner algorithm is popularly used for symbol timing estimate of digital communication receiver. Apart from the performance point of view, a multiplicative operation of any interpolation filter limits the symbol rate of the system. Hence, we suggest a new symbol timing estimate algorithm for high speed burst-mode fixed wireless communication system and analyze its performance in the AWGN channel.

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Initial Timing Acquisition for Binary Phase-Shift Keying Direct Sequence Ultra-wideband Transmission

  • Kang, Kyu-Min;Choi, Sang-Sung
    • ETRI Journal
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    • v.30 no.4
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    • pp.495-505
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    • 2008
  • This paper presents a parallel processing searcher structure for the initial synchronization of a direct sequence ultra-wideband (DS-UWB) system, which is suitable for the digital implementation of baseband functionalities with a 1.32 Gsample/s chip rate analog-to-digital converter. An initial timing acquisition algorithm and a data demodulation method are also studied. The proposed searcher effectively acquires initial symbol and frame timing during the preamble transmission period. A hardware efficient receiver structure using 24 parallel digital correlators for binary phase-shift keying DS-UWB transmission is presented. The proposed correlator structure operating at 55 MHz is shared for correlation operations in a searcher, a channel estimator, and the demodulator of a RAKE receiver. We also present a pseudo-random noise sequence generated with a primitive polynomial, $1+x^2+x^5$, for packet detection, automatic gain control, and initial timing acquisition. Simulation results show that the performance of the proposed parallel processing searcher employing the presented pseudo-random noise sequence outperforms that employing a preamble sequence in the IEEE 802.15.3a DS-UWB proposal.

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