• Title/Summary/Keyword: timing error

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Incremental Techniques for Timing Analysis Considering Timing and Circuit Structure Changes (지연시간과 회로 구조 변화를 고려한 증가적 타이밍 분석)

  • O, Jang-Uk;Han, Chang-Ho
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.8
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    • pp.2204-2212
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    • 1999
  • In this paper, we present techniques which perform incremental timing analysis using Timed Boolean Algebra that solves the false path problem and extracts the timing information in combinational circuits. Our algorithm sets histories of internal inputs that are substituted for internal output and extracts maximal delays through checking sensitizability of primary outputs. Once finding the sum of primitive delay terms, then it applies modified delay with referencing histories of primary output and it can extract maximal delays of primary outputs fast and efficiently. When the structure of circuit is changed, there is no need to compute the whole circuit again. We can process partial timing analysis of computing on the gates that are need to compute again. These incremental timing analysis methods are considered both delay changes and structure of circuit, and can reduce the costs of a trial error in the circuit design.

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Data Decision Aided Timing Tracker in IR-UWB System using PPM (PPM 변조방식의 IR-UWB 시스템에서 데이터 결정방식을 이용한 타이밍 추적기)

  • Ko, Seok-Jun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.1
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    • pp.98-105
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    • 2007
  • In this paper, we propose a timing detector using suboptimal maximum likelihood method. The proposed method has an simple reference signal generator. Additionally, timing detector's gain of the proposed method is the same to Early-Late gate and ML method. We reveal that tracking range of time tracker is narrow because of using data-decision, that is, tracking range is ${\pm}0.06ns$ for the 4-order Gaussian monocycle with 0.7ns pulse width. Therefore we can find that searcher must have very accurate acquisition procedure. When estimating a performance of time tracker, we consider a jitter in transmitter and receiver's pulse generation process as well as background noise. By using computer simulation, we propose mean/variance of timing detector and tracking process. Also we consider a mobility in tracking process, i.e., timing error modeled ramp function. In order to propose a performance of time tracker, we consider only one correlation demodulator.

Performance Analysis of Error and Congestion Control Algorithm in Transport Layer Mobility Support Approach (트랜스포트 계층 이동성 지원 방안에서의 오류 및 혼잡제어 알고리즘 성능분석)

  • Jang, Moon-Jeong;Lee, Mee-Jeong
    • The KIPS Transactions:PartC
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    • v.12C no.5 s.101
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    • pp.733-740
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    • 2005
  • In this paper, we propose an approach to transport layer mobility support leveraging the SCTP extension dubbed dynamic address reconfiguration in IPv6 networks. Timing issues related to the end-to-end address management, and a novel error recovery mechanism associated with a handover are discussed. The proposed error recovery mechanism is analyzed and compared to that of the plain SCTP to show that it reduces the handover latency and error recovery time.

The study on factor and model through error analysis to equipment operation (Focused on the Semiconductor industry) (설비 운영의 에러 분석을 통한 인자 및 모델연구 -반도체 산업중심-)

  • Yoon, Yong-Gu;Park, Peom
    • Proceedings of the Safety Management and Science Conference
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    • 2009.11a
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    • pp.187-201
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    • 2009
  • Semiconductor industry is based on equipment industry and timing industry. In particular, semiconductor process is very complex and as semiconductor-chip width tails and is becoming equipment gradually more as a high technology. Equipment operation is primarily engaged in semiconductor manufacturing (engineers and operator) of being conducted by, equipment errors have also been raised. Equipment operational data related to the error of korea occupational safety and health agency were based on data and production engineers involved in the operator's questionnaire was drawn through the error factor. Equipment operating in the error factor of 9 big item and 36 detail item detailed argument based on the errors down, and 9 big item the equipment during operation of the correlation error factor was conducted. Each of the significance level was correlated with the tabulation and analysis. Using the maximum correlation coefficient, the correlation between the error factors to derive the relationship between factors were analyzed. Facility operating with the analysis of error factors (big and detail item) derive a relationship between the model saw. The end of the operation of the facility in operation on the part of the two factors appeared as prevention. Safety aspects and ergonomics aspects of the approach should be guided to the conclusion.

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Hierarchical Channel Coding Scheme Using UEP Method for Rain-Attenuation Compensation in Satellite Communication (위성통신에서 강우 감쇠 보상을 위한 UEP 방식의 계층적 부호화 방식)

  • Jung Ji-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.9 s.112
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    • pp.795-803
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    • 2006
  • In this paper, we studied hierarchical channel coding scheme using unequal error protection method fur consecutively broadcastingservice under the rain attenuation of Ka band satellite broadcasting. Unlike time-sharing methods, which are design for different channel coding scheme in according to different modulation, unequal error protection method is made in such way that minimum distance between signals are different for importance of signals with same modulation. Consequently we proposed optimal method according to performance analysis.

An On-line Algorithm to Search Minimum Total Error for Imprecise Real-time Tasks with 0/1 Constraint

  • Song Gi-Hyeon
    • Journal of Korea Multimedia Society
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    • v.8 no.12
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    • pp.1589-1596
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    • 2005
  • The imprecise real-time system provides flexibility in scheduling time-critical tasks. Most scheduling problems of satisfying both 0/1 constraint and timing constraints, while the total error is minimized, are NP complete when the optional tasks have arbitrary processing times. Liu suggested a reasonable strategy of scheduling tasks with the 0/1 constraint on uniprocessors for minimizing the total error. Song et al suggested a reasonable strategy of scheduling tasks with the 0/1 constraint on multiprocessors for minimizing the total error. But, these algorithms are all off-line algorithms. On the other hand, in the case of on line scheduling, Shih and Liu proposed the NORA algorithm which can find a schedule with the minimum total error for a task system consisting solely of on-line tasks that are ready upon arrival. But, for the task system with 0/1 constraint, it has not been known whether the NORA algorithm can be optimal or not in the sense that it guarantees all mandatory tasks are completed by their deadlines and the total error is minimized. So, this paper suggests an optimal algorithm to search minimum total error for the imprecise on-line real-time task system with 0/1 constraint. Furthermore, the proposed algorithm has the same complexity, O(N log N), as the NORA algorithm, where N is the number of tasks.

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Scheduling Algorithm to Minimize Total Error for Imprecise On-Line Tasks

  • Song, Gi-Hyeon
    • Journal of Korea Multimedia Society
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    • v.10 no.12
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    • pp.1741-1751
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    • 2007
  • The imprecise computation technique ensures that all time-critical tasks produce their results before their deadlines by trading off the quality of the results for the computation time requirements of the tasks. In the imprecise computation, most scheduling problems of satisfying both 0/1 constraints and timing constraints, while the total error is minimized, are NP-complete when the optional tasks have arbitrary processing times. In the previous studies, the reasonable strategies of scheduling tasks with the 0/1 constraints on uniprocessors and multiprocessors for minimizing the total error are proposed. But, these algorithms are all off-line algorithms. Then, in the on-line scheduling, NORA(No Off-line tasks and on-line tasks Ready upon Arrival) algorithm can find a schedule with the minimum total error. In NORA algorithm, EDF(Earliest Deadline First) strategy is adopted in the scheduling of optional tasks. On the other hand, for the task system with 0/1 constraints, NORA algorithm may not suitable any more for minimizing total error of the imprecise tasks. Therefore, in this paper, an on-line algorithm is proposed to minimize total error for the imprecise real-time task system with 0/1 constraints. This algorithm is suitable for the imprecise on-line system with 0/1 constraints. Next, to evaluate performance of this algorithm, a series of experiments are done. As a consequence of the performance comparison, it has been concluded that IOSMTE(Imprecise On-line Scheduling to Minimize Total Error) algorithm proposed in this paper outperforms LOF(Longest Optional First) strategy and SOF(Shortest Optional First) strategy for the most cases.

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A Feasibility Test on the DGPS by Correction Projection Using MSAS Correction

  • Yoon, Dong Hwan;Park, Byungwoon;Yun, Ho;Kee, Changdon
    • Journal of Positioning, Navigation, and Timing
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    • v.3 no.1
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    • pp.25-30
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    • 2014
  • Differential Global Positioning System-Correction Projection (DGPS-CP) algorithm, which has been suggested as a method of correcting pre-calculated position error by projecting range-domain correction to positional domain, is a method to improve the accuracy performance of a low price GPS receiver to 1 to 3 m, which is equivalent to that of DGPS, just by using a software program without changing the hardware. However, when DGPS-CP algorithm is actually realized, the error is not completely eliminated in a case where a reference station does not provide correction of some satellites among the visible satellites used in user positioning. In this study, the problem of decreased performance due to the difference in visible satellites between a user and a reference station was solved by applying the Multifunctional Transport Satellites (MTSAT) based Augmentation System (MASA) correction to DGPS-CP, instead of local DGPS correction, by using the Satellite Based Augmentation System (SBAS) operated in Japan. The experimental results showed that the accuracy was improved by 25 cm in the horizontal root mean square (RMS) and by 20 cm in the vertical RMS in comparison to that of the conventional DGPS-CP.

Development of a CSGPS/DR Integrated System for High-precision Trajectory Estimation for the Purpose of Vehicle Navigation

  • Yoo, Sang-Hoon;Lim, Jeong-Min;Oh, Jeong-Hun;Kim, Ho-Beom;Lee, Kwang-Eog;Sung, Tae-Kyung
    • Journal of Positioning, Navigation, and Timing
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    • v.4 no.3
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    • pp.123-130
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    • 2015
  • In this study, a carrier smoothed global positioning system / dead reckoning (CSGPS/DR) integrated system for high-precision trajectory estimation for the purpose of vehicle navigation was proposed. Existing code-based GPS has a low position accuracy, and carrier-phase differential global positioning system (CPDGPS) has a long waiting time for high-precision positioning and has a problem of high cost due to the establishment of infrastructure. To resolve this, the continuity of a trajectory was guaranteed by integrating CSGPS and DR. The results of the experiment indicated that the trajectory precision of the code-based GPS showed an error performance of more than 30cm, while that of the CSGPS/DR integrated system showed an error performance of less than 10cm. Based on this, it was found that the trajectory precision of the proposed CSGPS/DR integrated system is superior to that of the code-based GPS.