• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 제38회 하계학술대회
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• pp.499-500
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• 2007

The existing digital protection relay is continuously growing with an improvement in technology. In this paper, we propose the development of the digital protection relay which displays the trip area in real time. In most of the digital protection relays monitor whether analog signal enters into the pre-determined trip area, but those aren't provide the trip area information for a operator in real time. Therefore, if the digital protection relay continuously displays the trip area in real time, the operator analysis power system status easily. This paper particularly introduces selective ground protective relay and differential protective relay with trip area and presents a method of providing the trip area information to operator in real time.

• 한국CDE학회논문집
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• 제13권1호
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• pp.18-26
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• 2008

Shipbuilding industries have been struggling to reduce production time and cost of their products in many aspects. Manufacturing systems have been changed, new production lines and robots have been installed, and new planning and scheduling systems have been adopted in order to achieve shorter time-to-market and higher productivity. Simulation based manufacturing, digital manufacturing, or virtual manufacturing simulation, whatever the name means, is an approach to achieve such a goal. In order to improve productivity in a shipbuilding process at a shipyard, a digital shipyard development has been driven. This paper proposed how to implement the digital shipyard, what to do with it, and what to obtain from it. This digital shipyard will help simulate and optimize the entire shipbuilding life cycle with its virtual environment through shipbuilding process from the initial development stage to the launch.

• 전력전자학회논문지
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• 제20권2호
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• pp.167-174
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• 2015

This study describes how digital time delay deteriorates control performance in zero voltage switching (ZVS) phase-shifted full bridge (PSFB) converter. The small-signal model of the ZVS PSFB converter is derived from the buck-converter small-signal model. Digital time delay effects have been considered according to the digital sampling methods. The analysis verifies that digital time delays reduce the stability margin of the converter, and the double sampling technique exhibits better performance than the single sampling technique. Both simulation and experimental results based on 250 W ZVS PSFB confirm the validity of the analyses performed in the study.

• 한국산업정보학회논문지
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• 제17권2호
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• pp.33-43
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• 2012

디지털 사이니지란 멀티미디어 기반의 정보와 광고를 소비자에게 전달하는 스마트 전자 디스플레이 시스템을 일컫는다. 대부분의 디지털 사이니지는 일련의 멀티미디어 콘텐츠를 원격 네트워크 스토리지로부터 로컬 디스크로 다운로드 한 후에 재생을 시작한다. 하지만 모든 콘텐츠를 다운로드 한 후 재생할 경우에 긴 초기 지연시간을 초래한다. 본 논문에서는 디지털 사이니지에서 이러한 초기 지연시간 문제를 정의하고, 주어진 네트워크 대역폭 및 멀티미디어 콘텐츠의 품질과 크기에 따라서 최소한으로 필요한 초기 지연시간을 계산하는 방법을 제시한다. 또한, 디지털 사이니지 상의 다양한 멀티미디어 콘텐츠들을 이용하여 본 제안 기법의 성능을 분석한다.

• 한국시뮬레이션학회논문지
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• 제29권2호
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• pp.11-20
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• 2020

제조환경이 더욱 복잡해짐에 따라 전통적인 시뮬레이션만으로는 실시간 현장 결과를 평가하는 데 많은 어려움을 겪고 있다. 이를 극복하기 위한 대안으로 Digital Twin개념이 활발히 논의되고 있지만, 제품설계 단계에 국한되어 연구가 진행되고 있는 실정이다. 본 연구는 Digital Twin개념이 생산 공정 프로세스에 적용되기 위한 Digital Twin 기반 제조환경 프레임워크를 제시하였다. 구성요소는 실제 생산환경인 물리적 시스템과 데이터베이스, 그리고 가상 시스템인 트윈 모델을 제안하였다. 본 연구에서는 Arena 소프트웨어와 엑셀 VBA를 활용하여 컨베이어 시스템을 대상으로 간단한 Digital Twin 기반 제조시스템을 모의실험하였다. 실험결과 트윈 모델이 실제 물리적 시스템의 실시간 데이터를 전송받아 동일한 시간단위로 작동됨을 확인하였고, 엑셀 VBA에서 축적된 실시간 데이터와 학습 데이터를 기반으로 조정된 파라미터를 생성하고 있음을 확인하였다. 또한, 간단한 모의실험을 통해 Digital Twin 모델 구동 방법을 제안하였으며, Digital Twin 모델의 구현 가능성을 보여주었다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2593-2596
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• 2003

The deadbeat properties have been well known in designing digital control systems. But recently several researchers proposed a CDBC(Continuout-time DeadBeat Controller) in continuous time. They used delay or smoothing elements from the finite Laplace Transform. A delay element is made by the exponential terms. A smoothing element is used to smooth the digital control input. And eventually the process is argumentd with smoothing elements and then well-known digital deadbeat controller is designed Sometimes samplings are done in continuous time systems and some hold devices are used to relate to digital systems. So multirate sampling may enhance the efficiency of the CDBC. A DC servo motor is chosen for implementing CDBC algorithm. Especially Outputs according to the variable input and disturbance are simulated. by use of Matlab Simulink.

• 한국정밀공학회지
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• 제21권5호
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• pp.91-98
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• 2004

Human uses level difference and time difference to get space information. Therefore this paper shows that method to presume direction of sound source by time difference and to mark presumed position. The position means direction from geometrical center of sensors to the sound source. To get the time difference of microphones input level, we will be explained about arrangement of microphones which used for the sensor to take the sound signal. It is included distance among the 3 microphones and distance between microphones and sound source. Secondly, input signals are transmitted to CPU througth digital process. CPU is used to DSP(Digital Signal Processor) for manage the signal by real time. Finally, the position of sound source is perceived by an explained algorithm in this paper.

• 한국정보통신학회논문지
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• 제23권7호
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• pp.816-821
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• 2019

듀얼에지 T 플립플롭을 사용하여 카운터 타입의 시간-디지털 변환기를 설계하였다. 시간-디지털 변환기는 공급 전압 1.5volts에서 $0.18{\mu}mCMOS$ 공정으로 설계하였다. 일반적인 시간-디지털 변환기에서 클록의 주기가 T일 때, 입력신호와 클록의 비동기로 인하여 클록의 주기에 해당하는 변환 에러가 발생한다. 그러나 본 논문에서 제안한 시간-디지털 변환기의 클록은 입력신호인 시작신호와 동기화되어 생성된다. 그 결과 시작신호와 클록의 비동기로 인해 발생할 수 있는 변환 에러는 발생하지 않는다. 그리고 카운터를 구성하는 플립플롭은 분해능 향상을 위해 클록의 상승에지와 하강에지에서 동작하는 듀얼에지 플립플롭으로 구성하였다.

• 한국벤처창업학회:학술대회논문집
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• 한국벤처창업학회 2018년도 추계학술대회
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• pp.277-281
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• 2018

Information system has been at center of economic development in several developed countries, and as Africa envision to improve its global economic competitiveness it is important to assess penetration rate the digital divide and catch-up effect over the years. This paper examined whether there exists digital divide and if so, is it narrowing over time and whether the ICT is converging with time in the African countries. Three technologies namely mobile-cellular, internet and fixed broadband were used to measure the digital divide and the catch-up effect. Gamma and sigma convergence methodology together with averaged penetration ratios were used to assess the cross-country performance of each technology. This study confirms both the narrowing of digital divide and convergence of ICT in all three technologies for both total group and subgroups. The digital gap was narrowing over time and the low-income countries were catching up faster to the middle-income countries in all three technologies. However, there are marked differences exhibited in the speed of narrowing digital divide and the speed of convergence between the total groups and the subgroups of countries. Some policy implications were discussed in the conclusion and they can be utilized in designing developmental ICT policies in each technology case for individual countries.

• International Journal of Contents
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• 제17권4호
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• pp.91-100
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• 2021

The purpose of this study was to identify factors affecting Visual Display Terminal (VDT) syndrome for elementary school students in the digital learning environment. Multiple regression analyses were performed to identify the factors affecting VDT syndrome in the digital learning environment. This was conducted with 256 elementary school students in grades 5-6 with more than a year of experience in digital learning. The regression model explained 41% of elementary school students' VDT syndrome in the digital learning environment. Variables significantly affecting VDT syndrome include game addiction, sleep time, and air quality with game addiction as the most influential. In the digital learning environment, VDT syndrome is significant because it has physical and psychological impacts on the growth of elementary school students. Therefore, it is necessary to develop guidelines for ideal computer usage habits for this age group.