• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.99-99
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• 2013

In this talk, I will present two research works in progress, which are: i) mapping of piezoelectric polarization and associated charge density distribution in the heteroepitaxial InGaN/GaN multi-quantum well (MQW) structure of a light emitting diode (LED) by using inline electron holography and ii) in-situ observation of the polarization switching process of an ferroelectric Pb(Zr1-x,Tix)O3 (PZT) thin film capacitor under an applied electric field in transmission electron microscope (TEM). In the first part, I will show that strain as well as total charge density distributions can be mapped quantitatively across all the functional layers constituting a LED, including n-type GaN, InGaN/GaN MQWs, and p-type GaN with sub-nm spatial resolution (~0.8 nm) by using inline electron holography. The experimentally obtained strain maps were verified by comparison with finite element method simulations and confirmed that not only InGaN QWs (2.5 nm in thickness) but also GaN QBs (10 nm in thickness) in the MQW structure are strained complementary to accommodate the lattice misfit strain. Because of this complementary strain of GaN QBs, the strain gradient and also (piezoelectric) polarization gradient across the MQW changes more steeply than expected, resulting in more polarization charge density at the MQW interfaces than the typically expected value from the spontaneous polarization mismatch alone. By quantitative and comparative analysis of the total charge density map with the polarization charge map, we can clarify what extent of the polarization charges are compensated by the electrons supplied from the n-doped GaN QBs. Comparison with the simulated energy band diagrams with various screening parameters show that only 60% of the net polarization charges are compensated by the electrons from the GaN QBs, which results in the internal field of ~2.0 MV cm-1 across each pair of GaN/InGaN of the MQW structure. In the second part of my talk, I will present in-situ observations of the polarization switching process of a planar Ni/PZT/SrRuO3 capacitor using TEM. We observed the preferential, but asymmetric, nucleation and forward growth of switched c-domains at the PZT/electrode interfaces arising from the built-in electric field beneath each interface. The subsequent sideways growth was inhibited by the depolarization field due to the imperfect charge compensation at the counter electrode and preexisting a-domain walls, leading to asymmetric switching. It was found that the preexisting a-domains split into fine a- and c-domains constituting a $90^{\circ}$ stripe domain pattern during the $180^{\circ}$ polarization switching process, revealing that these domains also actively participated in the out-of-plane polarization switching. The real-time observations uncovered the origin of the switching asymmetry and further clarified the importance of charged domain walls and the interfaces with electrodes in the ferroelectric switching processes.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.461-462
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• 2011

In this paper, a static overmodulation method using the effective time to control the overmodulation is proposed. The effective time is derived from actual switching time interval. The proposed method reduces the complex operations such as complicated gating time. The experimental results have been simulated in MATLAB/SIMULINK.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.10
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• pp.35-42
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• 2003

In this paper, we classified the wavelength reservation mechanisms of optical burst switching (OBS), and investigated the path length priority effect of the offset time/delayed reservation (OT/DR)-based scheme like the just-enough-time (JET) protocol. And, we showed that the fiber delay line (FDL)-based scheme can avoid the path length priority effect in multiple hop network environments. Also, we proposed a novel FDL/DR with hop-by-hop priority increasing (HPI) scheme which can improve the end-to-end throughput by increasing the priority of bursts hop-by-hop using the input FDLs at each node. The simulation results showed that the proposed FDL/DR with HPI scheme could avoid the path length priority effect and enhance the end-to-end throughput in multiple hop network environments.

• Transactions of the Korean Society of Automotive Engineers
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• v.18 no.6
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• pp.23-30
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• 2010

A detailed circuit level model requires a small sampling time to represent high frequency switching behaviors with proper resolution. The small sampling time leads a large execution time to obtain the system analysis results. As the alternative of the detailed circuit model, an averaged PWM switch model was proposed for the rapid system level analysis. There exists a voltage distortion between the reference and output voltage because of non-ideal switching characteristics, such as the dead-time, diode forward voltage drop and conduction resistance. This paper analyzed causes and effects of the voltage distortion. The average inverter model, which reflecting this voltage distortion, is developed for the rapid and accurate analysis of automotive electric drive system in MATLAB/Simulink environment. The rapidity and accuracy of the proposed inverter model is proved through comparison between simulation and experiment.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.1
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• pp.15-21
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• 2004

This paper deals with asymptotic stabilization problems for linear systems with time-varying input disturbances. In order to eliminate the influence of a disturbance on the system, a disturbance observer is designed and the time-varying disturbance can be rejected using its estimated value. Since the disturbance observer is kind of low-pass filter, it has inevitably estimation errors. To eliminate the inflences on the performance due to these errors, the additional control is designed based on these estimation errors using a well-known min-max control method. It is shown that the asymptotic stability of the closed-loop system is guaranteed. In general, the min-max control method requires the switching of control inputs and the switching magnitude of the control input is determined by the disturbance estimation error bounds. As the error bounds can be made arbitrarily small by choosing the high gain for the disturbance observer, the control method suggested in this paper can reduce the chattering phenomena as small as possible. Therefore, it has superior performance to the existing ones.

• Journal of the Korea Society of Computer and Information
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• v.20 no.7
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• pp.33-40
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• 2015

The time slot assignment problem (TSAP) or Satellite Communications scheduling problem (SCSP) for a satellite performs $n{\times}n$ ground station data traffic switching has been known NP-hard problem. This paper suggests $O(n^2)$ time complexity algorithm for TSAP of a satellite that performs $n^2{\times}n^2$ ground station data traffic switching. This problem is more difficult than $n{\times}n$ TSAP as NP-hard problem. Firstly, we compute the average traffic for n-transponder's basic coverage zone and applies ground station exchange method that swap the ground stations until all of the transponders have a average value as possible. Nextly, we transform the D matrix to $D_{LB}$ traffic matrix that sum of rows and columns all of transponders have LB. Finally, we select the maximum traffic of row and column in $D_{LB}$, then decide the duration of kth switch mode to minimum traffic from selected values. The proposed algorithm can be get the optimal solution for experimental data.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.499-500
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• 2006

This paper presents a fast switching CMOS frequency synthesizer with a new coarse tuning method for PHS applications. To achieve the fast lock-time and the low phase noise performance, an efficient bandwidth control scheme is proposed. Charge pump up/down current mismatches are compensated with the current mismatch compensation block. Also, the proposed coarse tuning method selects the optimal tuning capacitances of the LC-VCO to optimize the phase noise and the lock-time. The measured lock-time is about $20{\mu}s$. This chip is fabricated with $0.25{\mu}m$ CMOS technology, and the die area is $0.7mm{\times}2.1mm$. The power consumption is 54mW at 2.7V supply voltage.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.4
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• pp.205-212
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• 2017

Linux Foundation has announced a real-time kernel, called Zephyr, for IoT applications recently. Zephyr kernel provides synchronous and asynchronous IPC for data communication between threads. Synchronous IPC is useful for programming multi-threads that need to be executed synchronously, since the sender thread is blocked until the data is delivered to the receiver thread and the completion of data transfer can be known to two threads. In general, 'IPC execution time' is defined as the time duration between the sender thread sends data and the receiver thread receives the data sent. Especially, it is important that 'IPC execution time' in the synchronous IPC should be fixed in real-time kernel like Zephyr. However, we have found that the execution time of the synchronous IPC in Zephyr kernel increases in proportion to the number of threads executing in the kernel. In this paper, we propose a method to implement a fixed time synchronous IPC in Zephyr kernel using Direct Thread Switching(DTS) technique. Using the technique, the receiver thread executes directly after the sender thread sends a data during the remaining time slice of the sender thread and we can archive a fixed IPC execution time even when the number of threads executing in the kernel increases. In this paper, we implemented synchronous IPC using DTS in the Zephyr kernel and found the IPC execution time of the IPC is always 389 cycle that is relatively small and fixed.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1991.10a
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• pp.137-140
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• 1991

The TDX-10 Time Switch architecture has modularity, high reliability and considerable large switch fabric having separated and both-way 1K time slot interchange switching circuit elements. In this paper, we present key functions, architecture, features and traffic characteristic of TDX-10 Time Switch. And we also describe some basic implementation technologies such as Frame Base Read-Write Separation Method, Multi-Write Method and Read-Write Separation Technique with Dual-port Memory.

• The Korean Journal of Applied Statistics
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• v.27 no.1
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• pp.123-132
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• 2014

Inflation uncertainty is known to have deleterious effects on facilities investment by disturbing the corporate decision on the opportunity cost of investment. In this paper, we test the validity of this hypothesis in Korea by estimating the inflation uncertainty with both a time-varing parameter model with GARCH disturbances and the relative price volatility and then, estimate the facilities investment equation which includes those uncertainty indicators. The uncertainty indexes estimated by the above-mentioned methods continue to fluctuate even after the inflation rate has dropped dramatically reflecting the structural changes of Korea's economy since the financial crisis in 1997. As a result of estimation of the investment equation by both OLS and GMM, we find the inflation uncertainty has a negative effect on facilities investment with a statistical significance. Moreover, by means of Markov-switching regression model utilized to verify the non-linearity of this relationship, we draw a conclusion that this negative effect of inflation uncertainty heightens asymmetrically during the downturn periods of business cycle.