• Title/Summary/Keyword: time-delay effect

Search Result 787, Processing Time 0.033 seconds

Application and Evaluation of Signal Metering at Special Roundabouts (특수유형 회전교차로 신호미터링 적용 및 평가)

  • Yang, Taeyang;Lee, YoungIhn;Yoon, Taekwan
    • The Journal of The Korea Institute of Intelligent Transport Systems
    • /
    • v.18 no.6
    • /
    • pp.96-109
    • /
    • 2019
  • Roundabouts are actively installed to reduce unnecessary congestion and reduce traffic accidents. However, it is difficult to apply more than 450 cars per, hour. In addition, there is a downside to the concentration of delays in certain directions depending on traffic conditions. To compensate for these shortcomings, signal metering was introduced. Signal metering is a technique that gives red signals to adjacent left traffic flow in the event of a delay in a particular direction. The purpose of this study is comparing the effect of signal metering in conventional and special types (turbo roundabout, flower roundabout) of roundabout. VISSIM API is used for analysis. The analysis result show that only conventional roundabout signal metering algorithm reduce delay time per vehicle. As the result of the turbo roundabout and flower roundabout signal metering algorithm increase delay time per vehicle, signal metering algorithm can be applied in conventional roundabout.

Fabrication of Phased Array EMAT and Its Characteristics (위상배열 EMAT의 제작 및 특성 평가)

  • Ahn, Bong-Young;Cho, Seung-Hyun;Kim, Young-Joo;Kim, Ki-Bok
    • Journal of the Korean Society for Nondestructive Testing
    • /
    • v.30 no.4
    • /
    • pp.373-379
    • /
    • 2010
  • EMAT has been applied in various fields for flaw detection and material characterization because it has noncontact property in wave generation and a good mode selectivity. Unfortunately, however, EMAT shows low signal to noise ratio relative to commercial contact transducer because of low energy conversion efficiency. If the phase matching through the control of time delay between each coil consisting of the array EMAT is accomplished, it is expected that it will be a solution for the improvement of low signal to noise ratio. In this experiment, the phased array EMATs which consists of 3 or 4 meander coils and one big magnet were fabricated for surface and vertical shear wave generation. Effect of phased delay control on signal directivity and amplitude enhancement was verified. A slit with the depth of 0.5 mm and a side-drill hole of 0.5 mm diameter were clearly detected by fabricated phased array EMATs, respectively.

Scheduling Algorithms and Queueing Response Time Analysis of the UNIX Operating System (UNIX 운영체제에서의 스케줄링 법칙과 큐잉응답 시간 분석)

  • Im, Jong-Seol
    • The Transactions of the Korea Information Processing Society
    • /
    • v.1 no.3
    • /
    • pp.367-379
    • /
    • 1994
  • This paper describes scheduling algorithms of the UNIX operating system and shows an analytical approach to approximate the average conditional response time for a process in the UNIX operating system. The average conditional response time is the average time between the submittal of a process requiring a certain amount of the CPU time and the completion of the process. The process scheduling algorithms in thr UNIX system are based on the priority service disciplines. That is, the behavior of a process is governed by the UNIX process schuduling algorithms that (ⅰ) the time-shared computer usage is obtained by allotting each request a quantum until it completes its required CPU time, (ⅱ) the nonpreemptive switching in system mode and the preemptive switching in user mode are applied to determine the quantum, (ⅲ) the first-come-first-serve discipline is applied within the same priority level, and (ⅳ) after completing an allotted quantum the process is placed at the end of either the runnable queue corresponding to its priority or the disk queue where it sleeps. These process scheduling algorithms create the round-robin effect in user mode. Using the round-robin effect and the preemptive switching, we approximate a process delay in user mode. Using the nonpreemptive switching, we approximate a process delay in system mode. We also consider a process delay due to the disk input and output operations. The average conditional response time is then obtained by approximating the total process delay. The results show an excellent response time for the processes requiring system time at the expense of the processes requiring user time.

  • PDF

Fast Switching of a Polymer-networked Twisted Nematic Liquid Crystal Cell (폴리머 네트워크가 형성된 TN 액정셀의 고속응답 특성)

  • Jin, Hye-Jung;Kim, Ki-Han;Baek, Jong-In;Kim, Jae-Chang;Yoon, Tae-Hoon
    • Korean Journal of Optics and Photonics
    • /
    • v.21 no.2
    • /
    • pp.69-73
    • /
    • 2010
  • We propose a method to enhance the response time of a twisted nematic liquid crystal (TN-LC) cell using an anisotropic polymer. Polymer networks are formed by the phase separation between a LC and a UV-curable polymer. A TN-LC cell is exposed to UV light after the mixture of LC and anisotropic polymer is injected into the TN-LC cell. As a result, turn-off time of a TN-LC cell can be decreased remarkably without any loss of the transmittance. The turn-off time of a TN-LC cell with pure LC was 16 ms, but those of polymer networked TN-LC cells were 12, 11, and 9 ms when the concentration of the polymer was 3, 5, and 10 wt%, respectively. Moreover, by virtue of the polymer network, the backflow effect and the delay time generated during the turn-off process disappeared.

CMOS Logic Design and Fabrication for Analyzing the Effect of Transient Radiation Damage (과도 방사선 피해 영향 분석을 위한 CMOS 논리 소자 설계 및 제작)

  • Jeong, Sang-Hun;Lee, Nam-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2012.05a
    • /
    • pp.880-883
    • /
    • 2012
  • In this paper, CMOS logic device, the INVERTER, NAND, NOR were designed and fabricated using 0.18um CMOS process for analyzing the effect of transient radiation damage. Fabricated logic devices were measured by applying a 1kHz input at 1.8V supply. As a result, the current consumption of less than 70uA and Rising time, Falling time was within a 4us. Experimental results transmission delays occurred when using a 50M cable for pulse radiation experiments.

  • PDF

Criteria for the Float Distribution (여유시간 분배기준에 관한 연구)

  • Lee Gul-Chan;Kim Kyung-Rai;Shin Dong-Woo
    • Proceedings of the Korean Institute Of Construction Engineering and Management
    • /
    • autumn
    • /
    • pp.509-512
    • /
    • 2003
  • The Critical Path Method(CPM) is an effective tool used for planning and scheduling. One of strong point in the CPM is what can calculate float. Float is able to prolong without having an effect on overall schedule of project, however concept and scope about ownership is not definite, because it is a by-product of project. Thus participants have had many dispute in using float because of their interests. In recent years, a few theories have evolved in an attempt to solve this problem. But the prior research did not make a reasonable distribution of float because their criteria of distribution was based on ratio for total project time. Actually, an application of float is achieved by participant's delay risk. Therefore. this paper proposes criteria for float distribution using delay risks, and the framework for the assessment of the delay risks.

  • PDF

An Analysis Technique for Interconnect Circuits with Multiple Driving Gates in Deep Submicron CMOS ASICs (Deep Submicron CMOS ASIC에서 다중 구동 게이트를 갖는 배선회로 해석 기법)

  • Cho, Kyeong-Soon;Byun, Young-Ki
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.36C no.12
    • /
    • pp.59-68
    • /
    • 1999
  • The timing characteristics of an ASIC are analyzed based on the propagation delays of each gate and interconnect wire. The gate delay can be modeled using the two-dimensional delay table whose index variables are the input transition time and the output load capacitance. The AWE technique can be adopted as an algorithm to compute the interconnect delay. Since these delays are affected by the interaction to the two-dimensional delay table and the AWE technique. A method to model this effect has been proposed through the effective capacitance and the gate driver model under the assumption of single driving gate. This paper presents a new technique to handle the multiple CMOS gates driving interconnect wire by extending previous approach. This technique has been implemented in C language and applied to several interconnect circuits driven by multiple CMOS gates. In most cases, we found a few tens of speed-up and only a few percents of errors in computing both of gate and interconnect delays, compared to SPICE.

  • PDF

Investigating the Effects of Hearing Loss and Hearing Aid Digital Delay on Sound-Induced Flash Illusion

  • Moradi, Vahid;Kheirkhah, Kiana;Farahani, Saeid;Kavianpour, Iman
    • Korean Journal of Audiology
    • /
    • v.24 no.4
    • /
    • pp.174-179
    • /
    • 2020
  • Background and Objectives: The integration of auditory-visual speech information improves speech perception; however, if the auditory system input is disrupted due to hearing loss, auditory and visual inputs cannot be fully integrated. Additionally, temporal coincidence of auditory and visual input is a significantly important factor in integrating the input of these two senses. Time delayed acoustic pathway caused by the signal passing through digital signal processing. Therefore, this study aimed to investigate the effects of hearing loss and hearing aid digital delay circuit on sound-induced flash illusion. Subjects and Methods: A total of 13 adults with normal hearing, 13 with mild to moderate hearing loss, and 13 with moderate to severe hearing loss were enrolled in this study. Subsequently, the sound-induced flash illusion test was conducted, and the results were analyzed. Results: The results showed that hearing aid digital delay and hearing loss had no detrimental effect on sound-induced flash illusion. Conclusions: Transmission velocity and neural transduction rate of the auditory inputs decreased in patients with hearing loss. Hence, the integrating auditory and visual sensory cannot be combined completely. Although the transmission rate of the auditory sense input was approximately normal when the hearing aid was prescribed. Thus, it can be concluded that the processing delay in the hearing aid circuit is insufficient to disrupt the integration of auditory and visual information.

Snowball Scheme: An Alternative Admission Control Scheme for 3GPP ARQ (Snowball 방식: 3GPP ARQ를 위한 대체 수락 제어 방식)

  • Shin, Woo-Cheol;Park, Jin-Kyung;Ha, Jun;Choi, Cheon-Won
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.44 no.8
    • /
    • pp.51-61
    • /
    • 2007
  • For provisioning reliable data transmission, the 3GPP RLC specification adopted a selective-repeat ARQ scheme assisted by a window-based admission control scheme. In the 3GPP ARQ, which is a member of the selective-repeat ARQ clan, inheres the reordering problem A long and irregular reordering time results in the degradation of throughput and delay performance, and may incur the overflow of the reordering buffer. Furthermore, the reordering time must be regulated to meet the requirements of some services which are loss-sensitive and delay-sensitive as well. Perceiving the reordering hazard, we propose an alternative, identified as snowball scheme, to the original admission control scheme of the 3GPP ARQ with aiming at deflating the occupancy of the reordering buffer. A unique feature of the snowball scheme is to reject a new DATA PDU if it is non-adjacent to any DATA PDU sojourning at the reordering buffer. Such an intentional rejection apparently reduces the occupancy of the reordering buffer while it may deteriorate the throughput and delay performance. Developing an analytical approximation method, we investigate the effect of snowball scheme on the saturated occupancy and throughput. Also, we, using a simulation method, evaluate the peak occupancy, normalized throughput and average delay in the practical environment. From the simulation results, we reveal that the snowball scheme is able to enhance occupancy performance as well as throughput performance compared with the original admission control scheme of the 3GPP ARQ.

Effect of Current Density on Material Removal in Cu ECMP (구리 ECMP에서 전류밀도가 재료제거에 미치는 영향)

  • Park, Eunjeong;Lee, Hyunseop;Jeong, Hobin;Jeong, Haedo
    • Tribology and Lubricants
    • /
    • v.31 no.3
    • /
    • pp.79-85
    • /
    • 2015
  • RC delay is a critical issue for achieving high performance of ULSI devices. In order to minimize the RC delay time, we uses the CMP process to introduce high-conductivity Cu and low-k materials on the damascene. The low-k materials are generally soft and fragile, resulting in structure collapse during the conventional high-pressure CMP process. One troubleshooting method is electrochemical mechanical polishing (ECMP) which has the advantages of high removal rate, and low polishing pressure, resulting in a well-polished surface because of high removal rate, low polishing pressure, and well-polished surface, due to the electrochemical acceleration of the copper dissolution. This study analyzes an electrochemical state (active, passive, transpassive state) on a potentiodynamic curve using a three-electrode cell consisting of a working electrode (WE), counter electrode (CE), and reference electrode (RE) in a potentiostat to verify an electrochemical removal mechanism. This study also tries to find optimum conditions for ECMP through experimentation. Furthermore, during the low-pressure ECMP process, we investigate the effect of current density on surface roughness and removal rate through anodic oxidation, dissolution, and reaction with a chelating agent. In addition, according to the Faraday’s law, as the current density increases, the amount of oxidized and dissolved copper increases. Finally, we confirm that the surface roughness improves with polishing time, and the current decreases in this process.