• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.11
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• pp.2009-2014
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• 2017

A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.133-138
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• 2017

This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The signal through a small RC time constant circuit has almost same loop filter output voltage. The signal through a large RC time constant circuit has the average value of loop filter output voltage and does as a role of reference voltage to the comparator. The output of the comparator controls the sub-charge pump which provide a current to LPF. When the loop filter output voltage increases, the sub-charge pump discharges the loop filter and decreases loop filter output voltage. When the loop filter output voltage decreases, the sub-charge pump charges the loop filter and increases loop filter output voltage. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.05a
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• pp.197-199
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• 2017

This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.10
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• pp.1935-1940
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• 2016

This paper proposes a phase-locked loop (PLL) to minimize the loop filter output voltage fluctuation by using a comparator including RC time constant circuits. The voltage variation of loop filter is inputted to RC time constant circuits which have two RC time constants, large and small. While a small RC time constant circuit quickly conveys the output voltage variation of loop filter, a large RC time constant circuit conveys slowly the output voltage variation of loop filter and its output looks like constant voltage. The output signal of the comparator controls the sub charge pump and reduces the input voltage variation of voltage-controlled oscillator (VCO). Therefore, the proposed PLL generates a phase noise reduced signal. It has been designed with a 1.8V supply voltage, 0.18um multi - metal and multi - poly layer CMOS process and proved by Hspice simulation.

• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.1152-1154
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• 2002

In this paper, a direct torque control method of an induction motor is proposed which enables constant switching frequency. The switching strategy of a conventional direct torque control scheme which is based on hysteresis comparator results in a variable switching frequency which depends on the speed, flux, stator voltage and hysteresis band of the comparator. This paper proposes a new switching strategy which determine the effective switching time on each switching period by comparing the ascending and descending torque slopes. The simulation results are presented to verify this proposed scheme.

• 전기의세계
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• v.26 no.3
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• pp.63-68
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• 1977

In this paper, the theory of pulse frequency modulated DC/DC power converter to obtain constant output voltage for all input voltage changes is discussed. The switch controller consisting of integrator and comparator determines the ON time of power switch-Thyristor-by the error between the load voltage and a load reference voltage. Resulting voltage and current waveforms have been studied theoretically in detail and verified experimentally for a resistive and inductive load condition. State equations for voltages and currents using binary logic variables are computed by digital computer. Comparison of these withe oscillograms obtained from an experimental model shows very close agreement.

• Proceedings of the KIEE Conference
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• 1997.07a
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• pp.346-348
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• 1997

This paper presents microprocessor-based real-time speed and position detection by inductive radio loop in new transportation system, such as magnetically levitated train system, rubber tyred train, and linear-motor car. The constant elapsed time method is used in this study for high accurate detection over a wide speed range. And for reliability and safety of the system, it is duplicated and data-bus level comparison is performed by fail-safe comparator.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.8
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• pp.40-48
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• 2015

In this paper, battery charging and discharging circuit with a single voltage power supply is proposed. The proposed circuit has the separated current path and charging-monitoring sequence control scheme. In the charging sequence, the proposed 2-level comparator combined with control signal of the micro-processor can control the constant charging current to protect the over current of the battery. Furthermore, the proposed circuit uses a periodic main power switch control to detect the discharging characteristics to estimate the approximated battery life-time. In the experiments, the proposed emergency power supply for emergency call system has 89% efficiency with 98% power factor. And the proposed sequence control scheme is well operated in the designed emergency power system.

• Journal of Power Electronics
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• v.15 no.1
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• pp.10-17
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• 2015

A quasi-constant on-time controlled buck front end in combined discontinuous conduction mode and boundary conduction mode is proposed to improve power factor (PF).When instantaneous AC input voltage is lower than the output bus voltage per period, the buck converter turns into buck-boost converter with the addition of a level comparator to compare input voltage and output voltage. The gate drive voltage is provided by an additional oscillator during distortion time to eliminate the cross-over distortion of the input current. This high PF comes from the avoidance of the input current distortion, thereby enabling energy to be delivered constantly. This paper presents a series analysis of controlling techniques and efficiency, PF, and total harmonic distortion. A comparison in terms of efficiency and PF between the proposed converter and a previous work is performed. The specifications of the converter include the following: input AC voltage is from 90V to 264V, output DC voltage is 80V, and output power is 94W.This converter can achieve PF of 98.74% and efficiency of 97.21% in 220V AC input voltage process.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.6
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• pp.619-628
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• 2019

In this paper, we designed a beta ray sensor for a true random number generator. Instead of biasing the gate of the PMOS feedback transistor to a DC voltage, the current flowing through the PMOS feedback transistor is mirrored through a current bias circuit designed to be insensitive to PVT fluctuations, thereby minimizing fluctuations in the signal voltage of the CSA. In addition, by using the constant current supplied by the BGR (Bandgap Reference) circuit, the signal voltage is charged to the VCOM voltage level, thereby reducing the change in charge time to enable high-speed sensing. The beta ray sensor designed with 0.18㎛ CMOS process shows that the minimum signal voltage and maximum signal voltage of the CSA circuit which are resulted from corner simulation are 205mV and 303mV, respectively. and the minimum and maximum widths of the pulses generated by comparing the output signal through the pulse shaper with the threshold voltage (VTHR) voltage of the comparator, were 0.592㎲ and 1.247㎲, respectively. resulting in high-speed detection of 100kHz. Thus, it is designed to count up to 100 kilo pulses per second.