• Journal of Powder Materials
• /
• v.4 no.1
• /
• pp.48-54
• /
• 1997

NiAl powders containing oxide dispersoids have been produced by mechanical alloying process in a controlled atmosphere using high energy attrition mill. The powders have been consolidated by hot extrusion and hot pressing followed by isothermal annealing to induce microstructure coarsening to improve high temperature properties. Grain growth and dispersoid coarsening kinetics have been investigated as functions of annealing time and temperature. Coarsening of dispersion strengthen NiAl and dispersoid has been discussed. Some clues of secondary recrystallization have been investigated. Mechanical property measurements have been also made and correlated with the microstructures.

• Journal of the Semiconductor & Display Technology
• /
• v.20 no.3
• /
• pp.57-64
• /
• 2021

The domestic semiconductor industry can produce various products that will satisfy customer needs by diversifying assembly parts and increasing compatibility between them. It is necessary to improve the production line as a method to reduce the work-in-process inventory (WIP) in the assembly line, the idle time of the worker, and the idle time of the process. The improvement of the production line is to balance the capabilities of each process as a whole, and to determine the timing of product input or the order of the work process so that the time required between each process is balanced. The purpose of this study is to find the optimal WIP and buffer size through SA (Simulated Annealing) that minimizes lead time while matching the number of two parts in a parallel assembly line with bottleneck process. The WIP level and buffer size obtained by the SA algorithm were applied to the CONWIP and DBR systems, which are the existing production systems, and the simulation was performed by applying them to the new hybrid production system. Here, the Hybrid method is a combination of CONWIP and DBR methods, and it is a production system created by setting new rules. As a result of the Simulation, the result values were derived based on three criteria: lead time, production volume, and work-in-process inventory. Finally, the effect of the hybrid production method was verified through comparative analysis of the result values.

• 한국신재생에너지학회:학술대회논문집
• /
• 2007.06a
• /
• pp.326-329
• /
• 2007

$CuInS_{2}$ thin films were synthesized by sulpurization of Cu/In Stacked elemental layer deposited onto glass Substrates by vacuum furnace annealing at temperature 200[$^{\circ}C$]. And structural and electrical properties were measured in order to certify optimum conditions for growth of the ternary compound semiconductor $CuInS_{2}$ thin films with non-stoichiometry composition. $CuInS_{2}$ thin film was well made at the heat treatment 200[$^{\circ}C$] of SLG/Cu/ln/S stacked elemental layer which was prepared by thermal evaporator, and chemical composition of the thin film was analyzed nearly as the proportion of 1 : 1 : 2. Physical properties of the thin film were investigated at various fabrication conditions substrate temperature, annealing and temperature, annealing time by XRD, FE-SEM and Hall measurement system. At the same time, carrier concentration, hall mobility and resistivity of the thin films was $9.10568{\times}10^{17}$ [$cm^{-3}$], 312.502 [$cm^{2}/V{\cdot}s$] and $2.36{\times}10^{-2}$ [${\Omega}{\cdot}cm$], respectively.

• Journal of Korean Vacuum Science & Technology
• /
• v.6 no.3
• /
• pp.126-132
• /
• 2002

The origin of image-sticking in metal-insulator-metal type thin-film diode liquid crystal displays(TFD-LCDs) is the asymmetric current-voltage(I-V) characteristic of TFD element. We developed that TFD-LCDs have reduced-image-sticking. Tantalum pentoxide(Ta$_2$O$\sub$5/) is a candidate for use in metal-insulator-metal(MIM) capacitors in switching devices for active-matrix liquid crystal displays(AM-LCDs). High quality Ta$_2$O$\sub$5/ thin films have been obtained from anodizing method. We fabricated a TFD element using Ta$_2$O$\sub$5/ films which had perfect current-voltage symmetry characteristics. We applied novel process technologies which were postannealed whole TFD element instead of conventional annealing to the fabrication. One-Time Post-Annealing(OPTA) heat treatment process was introduced to reduce the asymmetry and shift of the I-V characteristics, respectively. OPTA means that the whole layers of lower metal, insulator, and upper metal are annealed at one time. Futhermore, in this paper, we discussed the effects of top-electrode metals and annealing conditions.

• Journal of the Korean Society for Precision Engineering
• /
• v.18 no.9
• /
• pp.82-88
• /
• 2001

In order to fulfil the requirements of the various performance profiles of ceramic cutting tools, six different SiC-based ceramics have been fabricated by hot-pressing (SiC--${Si}_3 {N}_4$composites) or by hot-pressing and subsequent annealing (monolithic SiC and SiC-TiC composites). Correlation between the annealing time and the corresponding microstructure and the mechanical properties of resulting ceramics have been investigated. The grain size of both ${Si}_3 {N}_4$and SiC in SiC-${Si}_3 {N}_4$composites increased with the annealing time. Monolithic SiC has the highest hardness, SiC-TiC composite the highest toughness, and the SiC-${Si}_3 {N}_4$composite the highest strength among the ceramics investigated. The hardness of SiC-${Si}_3 {N}_4$composites was relatively independent of the grain size, but dependent on the sintered density. The cutting performance of the newly developed SiC-based ceramic cutting tools will be described in Part 2 of this paper.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.3
• /
• pp.27-33
• /
• 2000

The selective chemical vapor deposition techniques for Cu metallization were studied. For enhancing the selectivity, furnace annealing and N$_{2}$ plasma were treated on patterned TiN/BPSG prior to the copper deposition. As a result, Cu did not deposited lead to suppressing the nucleation on BPSG singificantly. With the increasement the plasma treatment temperature, copper nucleation on BPSG was suppressed mote effectively, From TOF-SIMS(Time-of-Flight Secondary ion Mass Spectrometry), it is considered that annealing and N$_{2}$ plasma treatment remove hydroxyl(0-H) group so that eliminating the nucleation site for copper precursor enhance the selectivity.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.2
• /
• pp.93-100
• /
• 2008

In this paper, we address a novel simulated annealing(SA)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip(SoCs), on the assumption that the test platform proposed in [1] is installed. The proposed method efficiently mixed the rectangle packing method with SA and improved the scheduling results by locally changing the test access mechanism(TAM) widths for cores and the testing orders. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce the overall test time.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.33 no.2
• /
• pp.93-98
• /
• 2020

We investigated the effect of a post-annealing process using ultraviolet (UV) light on the electrical properties of solution-processed InZnO (IZO) thin-film transistors (TFTs). UV light was irradiated on IZO TFTs for different time periods of 0s, 30s, and 90s. We measured transfer and retention stability curves to evaluate the performance of the fabricated TFTs. In addition, we measured height, amplitude, and phase AFM images to analyze changes in the surface and morphology of the devices. AFM measurements were performed by setting the drive amplitude of the cantilever tip to 47.9 mV in tapping mode, then dividing the device surface into 500 nm × 500 nm. In the case of IZO TFT irradiated with UV for 30s, the electron mobility and I_on/I_off ratio were improved, the threshold voltage was reduced by approximately 2 V, and the subthreshold swing also decreased form 1.34 V/dec to 1.11 V/dec.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.275.1-275.1
• /
• 2014

The effects of the interfacial buffer layer and temperature on the organic bulk heterojunction (BHJ) nanostructures of copper phthalocyanine (CuPc) and fullerene (C60) systems were investigated using real time in-situ x-ray scattering. In the CuPc:C60 BHJ structures, standing-on configured ${\gamma}$-CuPc phase was formed by co-deposition of CuPc and C60. Once formed ${\gamma}$-phase was thermally stable during the annealing upon $180^{\circ}C$. Meanwhile, the insertion of CuI buffer layer prior to deposition of the CuPc:C60 BHJ layer induced lying-down configured CuPc crystals in the BHJ layer. The lying CuPc peak intensity and the lattice parameter were increased by the thermal annealing. This increment of the intensity seemed to be related to the strain at the interface between CuPc:C60 and CuI, which was proportional to the enhancement of the power conversion efficiency of the device.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
• /
• 2003.02a
• /
• pp.68-71
• /
• 2003

We fabricated Ni-substrate for YBCO coated conductors and evaluated the effects of pressing and annealing time on texture. Ni substrate was fabricated by powder metallurgy technique and compacts were prepared by applying uniaxial or isostatic pressure. The texture of substrate made by applying cold isostatic pressure (CIP) was stronger than that by uniaxial pressure. The texture of substrate made by CIP had a strong 4-fold symmetry and [111] ∥ ND texture after annealing temperature of 100$0^{\circ}C$. It is to be noted that the degree of texture was almost independent of annealing time and the full-width at half-maximum (FWHM) of in-plane and out-of-plane was measured to be in the range of 9.55$^{\circ}$-10.53$^{\circ}$ and 8.57$^{\circ}$-9.85$^{\circ}$, respectively. Development of strong cube texture of Ni-substrate made by powder metallurgy technique in our study is considered to be suitable for the application of YBCO coated conductors.