• KSII Transactions on Internet and Information Systems (TIIS)
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• v.4 no.3
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• pp.400-410
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• 2010

In an identity-based threshold broadcast encryption (IDTHBE) scheme, a broadcaster chooses a set of n recipients and a threshold value t, and the plaintext can be recovered only if at least t receivers cooperate. IDTHBE scheme is different from the standard threshold public key encryption schemes, where the set of receivers and the threshold value are decided from the beginning. This kind of scheme has wide applications in ad hoc networks. Previously proposed IDTHBE schemes have ciphertexts which contain at least n elements. In addition, the security of theses schemes relies on the random oracles. In this paper, we introduce two new constructions of IDTHBE for ad hoc networks. Our first scheme achieves S-size private keys while the modified scheme achieves constant size private keys. Both schemes achieve approximately (n-t)-size ciphertexts. Furthermore, we also show that they are provablesecurity under the decision bilinear Diffie-Hellman Exponent (BDHE) assumption in the standard model.

• Journal of Broadcast Engineering
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• v.17 no.2
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• pp.374-387
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• 2012

In this paper, we implement a new hardware for finding the significant coefficients of a digital hologram and ciphering them using discrete wavelet packet transform (DWPT). Discrete wavelet transform (DWT) and packetization of subbands is used, and the adopted ciphering technique can encrypt the subbands with various robustness based on the level of the wavelet transform and the threshold of subband energy. The hologram encryption consists of two parts; the first is to process DWPT, and the second is to encrypt the coefficients. We propose a lifting based hardware architecture for fast DWPT and block ciphering system with multi-mode for the various types of encryption. The unit cell which calculates the repeated arithmetic with the same structure is proposed and then it is expanded to the lifting kernel hardware. The block ciphering system is configured with three block cipher, AES, SEED and 3DES and encrypt and decrypt data with minimal latency time(minimum 128 clocks, maximum 256 clock) in real time. The information of a digital hologram can be hided by encrypting 0.032% data of all. The implemented hardware used about 200K gates in $0.25{\mu}m$ CMOS library and was stably operated with 165MHz clock frequency in timing simulation.