• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.10a
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• pp.7-38
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• 2000

Performance, reliability, form factor drive flip chip use. BGAs and CSPs will provide stepping stone to FC DCA .Growing vendor infrastructure - Low cost, high density organic substrates -New generations of fluxes and underfills .Adhesives flip chip technology as a low cost flip chip alternatives -Low cost Au stud or Electroless Ni bumps -Reliable thermal cycling and electrical performance.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.4
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• pp.89-94
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• 2022

Thermoelectric materials can directly convert a temperature gradient to an electrical energy and vice-versa, and their performance is determined by the electrical conductivity, Seebeck coefficient, and thermal conductivity. However, it is difficult to establish an effective strategy for enhancing performance since electrical conductivity, Seebeck coefficient, and thermal conductivity are strongly dependent on the composition, crystal structure, and electronic structure of the material, and show a correlation with each other. Herein, based on the understanding of the formulas related to the performance of thermoelectric materials, we provide a methodology to establish feasible defect engineering strategies of thermal conductivity reduction for improving the performance of thermoelectric materials in connection with the experimental results.

• Journal of Welding and Joining
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• v.31 no.6
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• pp.77-83
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• 2013

3D packaging technology using TSV (Through Silicon Via)has been studied in the recent years to achieve higher performance, lower power consumption and smaller package size because electrical line is shorter electrical resistivity than any other packaging technology. To stack TSV chips vertically, reliable and robust bonding technology is required because mechanical stress and thermal stress cause fracture during the bonding process. Cu pillar/solder ${\mu}$-bump bonding process is usually to interconnect TSV chips vertically although it has weak shape to mechanical stress and thermal stress. In this study, we suggest Insert-Bump (ISB) bonding process newly to stack TSV chips. Through experiments, we tried to find optimal bonding conditions such as bonding temperature and bonding pressure. After ISB bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.23-31
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• 2019

In this study, we conducted numerical analyses using the Taguchi method and finite element method to calculate the thermal deformation of a printed circuit board and the effect of design factors on the thermal deformation. Analysis results showed that the thermal deformation of the panel had the strongest effect on the thermal deformation and shape of the strip and unit. In particular, the deformation in the z direction was larger than that in the xy-plane direction. The effect of design factors and the design conditions for reducing the thermal deformation of the panel and strip changed at the unit level. Therefore, it is recommended that panel-level thermal deformation must be controlled to reduce the final thermal deformation at the unit level because the thermal deformation of the strip strongly affects that of the unit.

• Journal of the Semiconductor & Display Technology
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• v.18 no.4
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• pp.149-153
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• 2019

The technology of electronic packaging among semiconductor technologies is evolving as an axis of the market in its own field beyond the simple assembly process of the past. In the field of electronic packaging technology, the packaging of power modules plays an important role for green electric vehicles. In this power module packaging, the thermal reliability is an important factor, and silicon nitride plays an important part of package substrates, Silicon nitride is a compound that is not found in nature and is made by chemical reaction between silicon and nitrogen. In this study, this core material, silicon nitride, was fabricated by reaction bonded silicon nitride. The fabricated silicon nitride was studied for thermo-mechanical properties, and through this, the structure of power module packaging was made using reaction bonded silicon nitride. And the characteristics of stress were evaluated using finite element analysis conditions. Through this, it was confirmed that reaction bonded silicon nitride could replace the silicon nitride as a package substrate.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.49-56
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• 2012

Recently, by the trends of electronic package to be smaller, thinner and more integrative, fine bump is required. but It can result in the electrical short by reduced cross-section of UBM and diameter of bump. Especially, the formation of IMCs and KV can have a significant affects about electrical and mechanical properties. In this paper, we analyzed the thermal deformation of flip-chip bump by using FEM. Through Thermal Cycling Test (TCT) of flip-chip package, We analyzed the properties of the thermal deformation. and We confirmed that the thermal deformation of the bump can have a significant impact on the driving system. So we selected IMCs thickness and bump diameter as variable which is expected to have implications for characteristics of thermal deformation. and we performed analysis of temperature, thermal stress and thermal deformation. Then we investigated the cause of the IMC's effects.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.28 no.9
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• pp.1408-1414
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• 2004

The use of flip-chip technology has many advantages over other approaches for high-density electronic packaging. ACF (anisotropic conductive film) is one of the major flip-chip technologies, which has short chip-to-chip interconnection length, high productivity, and miniaturization of package. In this study, thermal fatigue lift of ACF bonding flip-chip package has been predicted. Elastic and thermal properties of ACF were measured by using DMA and TMA. Temperature dependent nonlinear hi-thermal analysis was conducted and the result was compared with Moire interferometer experiment. Calculated displacement field was well matched with experimental result. Thermal fatigue analysis was also conducted. The maximum shear strain occurs at the outmost located bump. Shear stress-strain curve was obtained to calculate fatigue life. Fatigue model for electronic adhesives was used to predict thermal fatigue life of ACF bonding flip-chip packaging. DOE (Design of Experiment) technique was used to find important design factors. The results show that PCB CTE (Coefficient of Thermal Expansion) and elastic modulus of ACF material are important material parameters. And as important design parameters, chip width, bump pitch and bump width were chose. 2$^{nd}$ DOE was conducted to obtain RSM equation far the choose 3 design parameter. The coefficient of determination ($R^2$) for the calculated RSM equation is 0.99934. Optimum design is conducted using the RSM equation. MMFD (Modified Method for feasible Direction) algorithm is used to optimum design. The optimum value for chip width, bump pitch and bump width were 7.87mm, 430$\mu$m, and 78$\mu$m, respectively. Approximately, 1400 cycles have been expected under optimum conditions. Reliability analysis was conducted to find out guideline for control range of design parameter. Sigma value was calculated with changing standard deviation of design variable. To acquire 6 sigma level thermal fatigue reliability, the Std. Deviation of design parameter should be controlled within 3% of average value.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.1
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• pp.63-70
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• 2023

Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heatsensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.4
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• pp.35-41
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• 2016

Ceramic-metal based high power LED array package was developed via thick film LTCC technology using a glass-ceramic insulation layer and a silver conductor patterns directly printed on the aluminum heat sink substrate. The thermal resistance measurement using thermal transient tester revealed that ceramic-metal base LED package exhibited a superior heat dissipation property to compare with the previously known packaging method such as FR-4 based MCPCB. A prototype LED package sub-module with 50 watts power rating was fabricated using a ceramic-metal base chip-on-a board technology with minimized camber deformation during heat treatment by using partially covered glass-ceramic insulation layer design onto the aluminum heat spread substrate. This modified circuit design resulted in a camber-free packaging substrate and an enhanced heat transfer property compared with conventional MCPCB package. In addition, the partially covered design provided a material cost reduction compared with the fully covered one.

• Korea-Australia Rheology Journal
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• v.19 no.3
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• pp.125-131
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• 2007

Biodegradable polymeric blends are expected to be widely used by industry due to their environmental friendliness and comparable mechanical and thermal properties. Poly (lactic acid) (PLA) and poly (butylene succinate) (PBS) are such biodegradable polymers which aim to replace commodity polymers in future applications. Since cost and brittleness of PLA is quite high, it is not economically feasible to use it alone for day to day use as a packaging material without blending. In this study, blends of PLA and PBS with various compositions were prepared by using a laboratory-scale twin-screw extruder at $180^{\circ}C$. Morphological, thermal, rheological and mechanical properties were investigated on the samples obtained by compression molding to explore suitability of these compositions for packaging applications. Morphology of the blends was investigated by scanning electron microscopy (SEM). Morphology showed a clear phase difference trend depending on blend composition. Modulated differential scanning calorimetry (MDSC) thermograms of the blends indicated that the glass transition temperature ($T_g$) of PLA did not change much with the addition of PBS, but analysis showed that for PLA/PBS blend of up to 80/20 composition there is partial miscibility between the two polymers. The tensile strength and modulus were measured by the Instron Universal Testing Machine. Tensile strength, modulus and percentage (%) elongation at break of the blends decreased with PBS content. However, tensile strength and modulus values of PLA/PBS blend for up to 80/20 composition nearly follow the mixing rule. Rheological results also show miscibility between the two polymers for PBS composition less than 20% by weight. PBS reduced the brittleness of PLA, thus making it a contender to replace plastics for packaging applications. This work found a partial miscibility between PBS and PLA by investigating thermal, mechanical and morphological properties.