• Title/Summary/Keyword: thermal oxide film

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Effect of Deposition and Heat Treatment Conditions on the Electrical and Optical Properties of AZO/Cu/AZO Thin Film (증착 및 열처리 조건에 따른 AZO/Cu/AZO 박막의 전기적·광학적 특성 평가)

  • Chan-Young Kim;Ha-Eun Lim;Gaeun Yang;Sukjeang Kwon;Chan-Hee Kang;Sang-Chul Lim;Taek Yeong Lee
    • Korean Journal of Materials Research
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    • v.33 no.4
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    • pp.142-150
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    • 2023
  • AZO/Cu/AZO thin films were deposited on glass by RF magnetron sputtering. The specimens showed the preferred orientation of (0002) AZO and (111) Cu. The Cu crystal sizes increased from about 3.7 nm to about 8.5 nm with increasing Cu thickness, and from about 6.3 nm to about 9.5 nm with increasing heat treatment temperatures. The sizes of AZO crystals were almost independent of the Cu thickness, and increased slightly with heat treatment temperature. The residual stress of AZO after heat treatment also increased compressively from -4.6 GPa to -5.6 GPa with increasing heat treatment temperature. The increase in crystal size resulted from grain growth, and the increase in stress resulted from the decrease in defects that accompanied grain growth, and the thermal stress during cooling from heat treatment temperature to room temperature. From the PL spectra, the decrease in defects during heat treatment resulted in the increased intensity. The electrical resistivities of the 4 nm Cu film were 5.9×10-4 Ω·cm and about 1.0×10-4 Ω·cm for thicker Cu films. The resistivity decreased as the temperature of heat treatment increased. As the Cu thickness increased, an increase in carrier concentration resulted, as the fraction of AZO/Cu/AZO metal film increased. And the increase in carrier concentration with increasing heat treatment temperature might result from the diffusion of Cu ions into AZO. Transmittance decreased with increasing Cu thicknesses, and reached a maximum near the 500 nm wavelength after being heat treated at 200 ℃.

Electrical properties of metal-oxide-semiconductor structures containing Si nanocrystals fabricated by rapid thermal oxidation process (급속열처리산화법으로 형성시킨 $SiO_2$/나노결정 Si의 전기적 특성 연구)

  • Kim, Yong;Park, Kyung-Hwa;Jung, Tae-Hoon;Park, Hong-Jun;Lee, Jae-Yeol;Choi, Won-Chul;Kim, Eun-Kyu
    • Journal of the Korean Vacuum Society
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    • v.10 no.1
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    • pp.44-50
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    • 2001
  • Metal oxide semiconductor (MOS) structures containing nanocrystals are fabricated by using rapid thermal oxidations of amorphous silicon films. The amorphous films are deposited either by electron beam deposition method or by electron beam deposition assisted by Ar ion beam during deposition. Post oxidation of e-beam deposited film results in relatively small hysteresis of capacitance-voltage (C-V) and the flat band voltage shift, $\DeltaV_{FB}$ is less than 1V indicative of the formation of low density nanocrystals in $SiO_2$ near $SiO_2$/Si interface. By contrast, we observe very large hysteresis in C-V characteristics for oxidized ion-beam assisted e-beam deposited sample. The flat band voltage shift is larger than 22V and the hysteresis becomes even broader as increasing injection times of holes at accumulation condition and electrons at inversion condition. The result indicates the formation of slow traps in $SiO_2$ near $SiO_2$/Si interface which might be related to large density nanocrystals. Roughly estimated trap density is $1{\times}10^{13}cm^{-2}$. Such a large hysteresis may be explained in terms of the activation of adatom migration by Ar ion during deposition. The activated migration may increase nucleation rate of Si nuclei in amorphous Si matrix. During post oxidation process, nuclei grow into nanocrystals. Therefore, ion beam assistance during deposition may be very feasible for MOS structure containing nanocrystals with large density which is a basic building block for single electron memory device.

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Improvement of Calcium Phosphate Forming Ability of Titanium Implant by Thermal Oxidation Method (열산화법에 의한 티타늄 임플란트의 인산칼슘 결정의 형성 능력 증진)

  • Hwang, Kyu-Seog;An, Jun-Hyung;Lee, Seon-Ok;Yun, Yeon-Hum;Kang, Bo-An;Oh, Jeong-Sun;Kim, Sang-Bok
    • Journal of the Korean Ceramic Society
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    • v.39 no.5
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    • pp.460-466
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    • 2002
  • Titanium oxide film was deposited on the commercially pure titanium (cp-Ti) by thermal oxidation method for its medical application. The cp-Ti disks were cleaned and then heat-treated at the temperatures of 500, 550, 600, 650, and 700${\circ}C$, respectively, for 10 min in air or Ar. To test the ability of calcium phosphate formation, the specimens were immersed in the Eagle's minimum essential medium solution at 36.5${\circ}C$ for 15 days. The morphology and chemical composition of the surfaces before and after soaking were analyzed by using FE-SEM and EDS. The in-vitro formation of carbonated calcium phosphate on the thin films containing nano-sized $TiO_2$ crystals was identified.

Fabrication and characterization of $WSi_2$ nanocrystals memory device with $SiO_2$ / $HfO_2$ / $Al_2O_3$ tunnel layer

  • Lee, Hyo-Jun;Lee, Dong-Uk;Kim, Eun-Kyu;Son, Jung-Woo;Cho, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.134-134
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    • 2011
  • High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

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Synthesis of Core-shell Copper nanowire with Reducible Copper Lactate Shell and its Application

  • Hwnag, Hyewon;Kim, Areum;Zhong, Zhaoyang;Kwon, Hyeokchan;Moon, Jooho
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.430.1-430.1
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    • 2016
  • We present the concept of reducible fugitive material that conformally surrounds core Cu nanowire (NW) to fabricate transparent conducting electrode (TCE). Reducing atmosphere can corrodes/erodes the underlying/surrounding layers and might cause undesirable reactions such impurity doing and contamination, so that hydrogen-/forming gas based annealing is impractical to make device. In this regards, we introduce novel reducible shell conformally surrounding indivial CuNW to provide a protection against the oxidation when exposed to both air and solvent. Uniform copper lactate shell formation is readily achievable by injecting lactic acid to the CuNW dispersion as the acid reacts with the surface oxide/hydroxide or pure copper. Cu lactate shell prevents the core CuNW from the oxidation during the storage and/or film formation, so that the core-shell CuNW maintains without signficant oxidation for long time. Upon simple thermal annealing under vacuum or in nitrogen atmosphere, the Cu lactate shell is easily decomposed to pure Cu, providing an effective way to produce pure CuNW network TCE with typically sheet resistance of $19.8{\Omega}/sq$ and optical transmittance of 85.5% at 550 nm. Our reducible copper lactate core-shell Cu nanowires have the great advantage in fabrication of device such as composite transparent electrodes or solar cells.

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Effect of few-walled carbon nanotube crystallinity on electron field emission property

  • Jeong, Hae-Deuk;Lee, Jong-Hyeok;Lee, Byung-Gap;Jeong, Hee-Jin;Lee, Geon-Woong;Bang, Dae-Suk;Cho, Dong-Hwan;Park, Young-Bin;Jhee, Kwang-Hwan
    • Carbon letters
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    • v.12 no.4
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    • pp.207-217
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    • 2011
  • We discuss the influence of few-walled carbon nanotubes (FWCNTs) treated with nitric acid and/or sulfuric acid on field emission characteristics. FWCNTs/tetraethyl orthosilicate (TEOS) thin film field emitters were fabricated by a spray method using FWCNTs/TEOS sol one-component solution onto indium tin oxide (ITO) glass. After thermal curing, they were found tightly adhered to the ITO glass, and after an activation process by a taping method, numerous FWCNTs were aligned preferentially in the vertical direction. Pristine FWCNT/TEOS-based field emitters revealed higher current density, lower turn-on field, and a higher field enhancement factor than the oxidized FWCNTs-based field emitters. However, the unstable dispersion of pristine FWCNT in TEOS/N,N-dimethylformamide solution was not applicable to the field emitter fabrication using a spray method. Although the field emitter of nitric acid-treated FWCNT showed slightly lower field emission characteristics, this could be improved by the introduction of metal nanoparticles or resistive layer coating. Thus, we can conclude that our spray method using nitric acid-treated FWCNT could be useful for fabricating a field emitter and offers several advantages compared to previously reported techniques such as chemical vapor deposition and screen printing.

Effect of Scrap Addition Ratio on Tensile and Solidification Cracking Properties of AC4A Aluminum Casting Alloy (AC4A 알루미늄 합금의 인장 및 응고균열 특성에 미치는 스크랩 첨가 비율의 영향)

  • Oh, Seung-Hwan;Kim, Heon-Joo
    • Journal of Korea Foundry Society
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    • v.40 no.3
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    • pp.85-96
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    • 2020
  • The effect of an aluminum scrap addition ratio on the tensile and solidification cracking properties of the AC4A aluminum alloy in the as-cast state and heat-treated state were investigated in this study. Generally, the expected problem of using scrap in aluminum casting is an increase of hydrogen and Fe element inside the aluminum melt. Another issue is an oxide film which has a weak interface with the molten aluminum and acts as potent nucleation sites for internal porosity and crack initiation. Solidification cracking is one of the critical defects that must be resolved to produce high quality castings. A conventional evaluation method for solidification cracking is a relative and qualitative analysis method which does not provide quantitative data on the thermal stress in the solidification process. Therefore, a newly designed solidification cracking test apparatus was used in this study, and the device can provide quantitative data. As a result, after conducting experiments with different scrap addition ratios (0%, 20%, 35%, 50%), the tensile strengths and elongations in the as-cast state were 214, 187.7, 182.1 and 170.4MPa and 4.6%, 3.4%, 3.1% and 2.3%, respectively. In the case of the T6 heat-treated state, the tensile strengths and elongations were 314.9, 294.6, 293.1 and 271.1MPa and 5.4%, 4.6%, 3.8% and 3.1%, respectively. The strength of the solidification cracking was 3.1, 2.4, 2.2and 1.6MPa as the scrap addition ratio increases.

Brush-painted Ti-doped In2O3 Transparent Conducting Electrodes Using Nano-particle Solution for Printable Organic Solar Cells

  • Jeong, Jin-A;Kim, Han-Gi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.458.2-458.2
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    • 2014
  • We have demonstrated that simple brush-painted Ti-doped $In_2O_3$(TIO) films can be used as a cost effective transparent anodes for organic solar cells (OSCs). We examined the RTA effects on the electrical, optical, and structural properties of the brush painted TIO electrodes. By the direct brushing of TIO nanoparticle ink and rapid thermal annealing (RTA), we can simply obtain TIO electrodes with a low sheet resistance of 28.25 Ohm/square and a high optical transmittance of 85.48% under atmospheric ambient conditions. Furthermore, improvements in the connectivity of the TIO nano-particles in the top region during the RTA process play an important role in reducing the resistivity of the brush-painted TIO anode. In particular, the brush painted TIO films showed a much higher mobility ($33.4cm^2/V-s$) than that of previously reported solution-process transparent oxide films ($1{\sim}5cm^2/V-s$) due to the effects of the Ti dopant with higher Lewis acid strength (3.06) and the reduced contact resistance of TIO nanoparticles. The OSCs fabricated on the brush-painted TIO films exhibited cell-performance with an open circuit voltage (Voc) of 0.61 V, shot circuit current (Jsc) of $7.90mA/cm^2$, fill factor (FF) of 61%, and power conversion efficiency (PCE) of 2.94%. This indicates that brush-painted TIO film is a promising cost-effective transparent electrode for printing-based OSCs with its simple process and high performance.

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Semiconductor CdTe-Doped CdO Thin Films: Impact of Hydrogenation on the Optoelectronic Properties

  • Dakhel, Aqeel Aziz;Jaafar, Adnan
    • Korean Journal of Materials Research
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    • v.30 no.1
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    • pp.1-7
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    • 2020
  • Doping or incorporation with exotic elements are two manners to regulate the optoelectronic properties of transparent conducting (TCO) cadmium oxide (CdO). Nevertheless, the method of doping host CdO by CdTe semiconductor is of high importance. The structural, optical, and electrical properties of CdTe-doped CdO films are studied for the sake of promoting their conducting parameters (CPs), including their conductivity, carrier concentration, and carrier mobility, along with transparency in the NIR spectral region; these are then compared with the influence of doping the host CdO by pure Te ions. X-ray fluorescence (XRF), X-ray diffraction (XRD), optical absorption spectroscopy, and electrical measurements are used to characterise the deposited films prepared by thermal evaporation. Numerous results are presented and discussed in this work; among these results, the optical properties are studied through a merging of concurrent BGN (redshift) and BGW (blue shift) effects as a consequence of doping processes. The impact of hydrogenation on the characterisations of the prepared films is investigated; it has no qualitative effect on the crystalline structure. However, it is found that TCO-CPs are improved by the process of CdTe doping followed by hydrogenation. The utmost TCO-CP improvements are found with host CdO film including ~ 1 %Te, in which the resistivity decreases by ~ 750 %, carrier concentration increases by 355 %, and mobility increases by ~ 90 % due to the increase of Ncarr. The improvement of TCO-CPs by hydrogenation is attributed to the creation of O-vacancies because of H2 molecule dissociation in the presence of Te ions. These results reflect the potential of using semiconductor CdTe -doped CdO thin films in TCO applications. Nevertheless, improvements of the host CdO CPs with CdTe dopant are of a lesser degree compared with the case of doping the host CdO with pure Te ions.

Resistive Switching Effect of the $In_2O_3$ Nanoparticles on Monolayered Graphene for Flexible Hybrid Memory Device

  • Lee, Dong Uk;Kim, Dongwook;Oh, Gyujin;Kim, Eun Kyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.396-396
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    • 2013
  • The resistive random access memory (ReRAM) has several advantages to apply next generation non-volatile memory device, because of fast switching time, long retentions, and large memory windows. The high mobility of monolayered graphene showed several possibilities for scale down and electrical property enhancement of memory device. In this study, the monolayered graphene grown by chemical vapor deposition was transferred to $SiO_2$ (100 nm)/Si substrate and glass by using PMMA coating method. For formation of metal-oxide nanoparticles, we used a chemical reaction between metal films and polyamic acid layer. The 50-nm thick BPDA-PDA polyamic acid layer was coated on the graphene layer. Through soft baking at $125^{\circ}C$ or 30 min, solvent in polyimide layer was removed. Then, 5-nm-thick indium layer was deposited by using thermal evaporator at room temperature. And then, the second polyimide layer was coated on the indium thin film. After remove solvent and open bottom graphene layer, the samples were annealed at $400^{\circ}C$ or 1 hr by using furnace in $N_2$ ambient. The average diameter and density of nanoparticle were depending on annealing temperature and times. During annealing process, the metal and oxygen ions combined to create $In_2O_3$ nanoparticle in the polyimide layer. The electrical properties of $In_2O_3$ nanoparticle ReRAM such as current-voltage curve, operation speed and retention discussed for applictions of transparent and flexible hybrid ReRAM device.

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