• Title/Summary/Keyword: test circuit

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A study of the Impact of Fourism Attractions and Images on the Destination Development Patterns (관광 매력성과 이미지가 관광지 개발유형에 미치는 영향 연구)

  • 김계섭;김선영
    • Journal of Applied Tourism Food and Beverage Management and Research
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    • v.12 no.1
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    • pp.79-110
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    • 2001
  • Tourist Destination is based on tourism attractions. Components of Tourism attraction are included tourism resources, entertainment facilities, transportation, accommodation, infrastructure, assistance facilities & service, hospitality, information facilities & service, and retailing & service. Tourism resources of them is the key to determine destination development pattern, because tourism attraction that attract tourists is based on tourism resources. Therefore, there are need to study what is tourism attraction of destination at the view of tourists and what is destination development pattern based on it to develop tourism attraction that is able appeal tourists. The purpose of this study is to examine what effect of tourism attraction affects destination development pattern. This study defined Haeundae, Kwanganri, Songjung, Taejongdae in Pusan, Korea as research areas. Research data were collected from 300 respondents by a simple random sampling method. A final 284 usable questionaries were used for empirical analysis after data purification process. Reliability and validity of the scale on the tourism attraction, destination image, and facility needs have been evaluated using Cronbach $\alpha$, item-total correlations. This study analyzed the factors of the tourism attraction and destination images. The result obtained that tourism attraction is divided relaxation attraction, local activity attraction, culture . nature attraction and touring circuit attraction, and destination image is divided culture . urban attractiveness, touring attractiveness, local . stay attractiveness, convenience of travel and relativeness for destination investigated. ANOVA and regression (stepwise) were used to test hypotheses. Based on the results of hypotheses testing, major findings of the empirical research are as follow : 1. The tourism attraction and destination image are significantly different, but facility needs are not significantly by destinations (e. g. Haeundae, Kwanganri, Songjung, Taejongdae) . 2. Destination development pattern is a(fact by the tourism attraction in partial. In case of Haeundea, relaxation attraction take effect partially spa, history and marine/spa tourism. 3. The destination development pattern is influenced by the destination image in partial. In case of Kwanganri, the natural . activity attractiveness and urban tourism images have been found as influential factors that affect marine tourism. 4. The destination images are influenced the physical attributes in literature review, but the destination image are taken effect partially the tourism attraction in this study. 5. Destination development pattern are influenced by the tourism attraction and the destination image partially. This research has provided a variety of practical suggestions. Especially, it was suggested that the destination have appeal to tourists by strengthening attraction and improving weakness. Also, we need to specialize destination in same destination development pattern.

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Design of X-band 40 W Pulse-Driven GaN HEMT Power Amplifier Using Load-Pull Measurement with Pre-matched Fixture (사전-정합 로드-풀 측정을 통한 X-대역 40 W급 펄스 구동 GaN HEMT 전력증폭기 설계)

  • Jeong, Hae-Chang;Oh, Hyun-Seok;Yeom, Kyung-Whan;Jin, Hyeong-Seok;Park, Jong-Sul;Jang, Ho-Ki;Kim, Bo-Kyun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.11
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    • pp.1034-1046
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    • 2011
  • In this paper, a design and fabrication of 40 W power amplifier for the X-band using load-pull measurement of GaN HEMT chip are presented. The adopted active device for power amplifier is GaN HEMT chip of TriQuint company, which is recently released. Pre-matched fixtures are designed in test jig, because the impedance range of load-pull tuner is limited at measuring frequency. Essentially required 2-port S-parameters of the fixtures for extraction optimal input and output impedances is obtained by the presented newly method. The method is verified in comparison of the extracted optimal impedances with data sheet. The impedance matching circuit for power amplifier is designed based on EM co-simulation using the optimal impedances. The fabricated power amplifier with 15${\times}$17.8 $mm^2$ shows the efficiency above 35 %, the power gain of 8.7~8.3 dB and the output power of 46.7~46.3 dBm at 9~9.5 GHz with pulsed-driving width of 10 usec and duty of 10 %.

An Object Recognition Performance Improvement of Automatic Door using Ultrasonic Sensor (초음파 센서를 이용한 자동문의 물체인식 성능개선)

  • Kim, Gi-Doo;Won, Seo-Yeon;Kim, Hie-Sik
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.3
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    • pp.97-107
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    • 2017
  • In the field of automatic door, the infrared rays and microwave sensor are much used as the important components in charge of the motor's operation control of open and close through the incoming signal of object recognition. In case of existing system that the sensor of the infrared rays and microwave are applied to the automatic door, there are many malfunctions by the infrared rays and visible rays of the sun. Because the automatic doors are usually installed outside of building in state of exposure. The environmental change by temperature difference occurs the noise of object recognition detection signal. With this problem, the hardware fault that the detection sensor is unable to follow the object moving rapidly within detection area makes the sensing blind spot. This fault should be improved as soon as possible. Because It influences safety of passengers who use the automatic doors. This paper conducted an experiment to improve the detection area by installing extra ultrasonic sensor besides existing detection sensor. So, this paper realize the computing circuit and detection algorithm which can correctly and rapidly process the access route of objects moving fast and the location area of fixed obstacles by applying detection and advantages of ultrasonic signal to the automatic doors. With this, It is proved that the automatic door applying ultrasonic sensor is improved detection area of blind spot sensing through field test and improvement plan is proposed.

Study on the Smart 1RM System Development and Effect Verification for Health Improvement and Management of National Healthcare (국민 건강관리 및 체력증진을 위한 스마트 1RM 시스템 개발 및 효과 검증에 관한 연구)

  • Woo, Kyung-Min;Shin, Mi-Yeon;Yu, Chang-Ho
    • Journal of rehabilitation welfare engineering & assistive technology
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    • v.12 no.1
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    • pp.53-62
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    • 2018
  • In this study, we developed a smart 1RM system for national health management and physical fitness, which enables quantitative 1RM measurement in various types of exercise using digital pulley technology, and to test the effect on training by using it. We developed the smart 1RM system, which is composed of portable muscle strength measuring device, Bluetooth communication based mobile phone data transmission and circuit diagram, and height adjustable system body. We recruited the 30 participants with 20th aged and divided into training and non-performing groups with 15 participants randomly. The participants performed 5 sets of elbow, lumbar, knee extension / flexion 10 times using smart 1RM system and the experimental period was 3 days a week for a total of 8 weeks. The experimental results showed that the maximum strength of the elbow, lumbar, and knee joints was significantly improved before and after maximal muscle strength training in the training group. Oxygen intakes during 1RM exercise mode showed 10.91% than endurance. To verify the validity of the smart 1RM maximal strength data, the reliability was 0.895 (* p <0.00). This study can be applied to the early rehabilitation treatment of the elderly and rehabilitation patients more quantitatively using the national health care.

Fabrication and Transmission Experiment of the Distributed Feedback Laser Diode(DFB-LD) Module for 2.5Gbps Optical Telecommunication System (2.5Gbps 광통신용 distrbuted feedback laser diode(DFB-LD) 모듈 제작 및 광송신 실험)

  • 박경현;강승구;송민규;이중기;조호성;장동훈;박찬용;김정수;김홍만
    • Korean Journal of Optics and Photonics
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    • v.5 no.3
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    • pp.423-430
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    • 1994
  • We designed and fabricated the single mode fiber pigtailed DFB-LD module for 2.5 Gbps optical communication system. In the design of the DFB-LD module, we made the module divided into two parts of inner sub-module and outer 14-pin butterfly package and cylindrical shaped sub-module contain quasi confocal 2 lens system including optical isolator and electrical connection between these parts via hybrid substrate of bias T circuit. Laser welding was used to assemble the sub-module which requires accurate fixing between optical elements. The fabricated DFB-LD module showed optical coupling efficiency of 20% and - 3 dB small signal response of more than 2.6 GHz. We confirmed mechanical reliability of the module by temperature cycle test where the tested module exhibit optical power fluctuation of less than 10%. Finally we evaluated the performance of the fabricated DFB-LD module as light source of 2.5 Gbps optical communication system, sensitivity of - 30.2 dBm was obtained through 47 km optical fiber transmission under the criterion of $1\times10^{-10}$ BER and transmission penalties were 1.5 dB caused by extinction ratio and 1.0 dB caused by chromatic dispersion of normal single mode fiber. fiber.

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Vibration Test for PCB/Connector Assembly (인쇄회로기판 진동이 커넥터에 미치는 영향)

  • 허남일;김성철;송규섭
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 1995.10a
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    • pp.160-164
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    • 1995
  • 정보통신 시스템의 고속/고밀도화 요구에 따라 개발되고 있는 ATM(Asynchronous Transfer Mode) 교환기 시스템은 팬을 이용한 강제대류냉각 방식의 채택과 시스템이 설치되는 장소에 따른 여러 환경조건에 의한 진동 문제가 발생될 수 있다. 시스템의 진동으로 인한 피해중 커넥터 접촉부에서 전기적 특성의 변화는 고속으로 전송되는 신호의 왜곡을 유발시킬 수 있어 시스템 개발시 이에 대한 충분한 연구 및 시험이 요구되고 있다. 진동환경에서 커넥터 접촉부는 접촉면의 상대운동으로 인한 접촉저항의 증가와 순간적인 신호전달 중단을 가져오게 되며, 특히 PCB/Connector Assembly에서 커넥터 접촉부는 PCB(Printed Circuit Board)의 장착 조건 및 동적 거동에 따라 전기적 특성이 변할 수 있다. 시스템에서 커넥터의 동적 거동을 이해하기 위해서는 PCB를 포함하는 시스템내 여러 요소의 동적 특성 이해와 복잡한 해석과정이 요구되며, 시스템 개발자는 진동 환경에서 이것의 시험 결과에 따라 커넥터의 사용을 결정해야 할 것이다. 커넥터의 전기적 특성 시험법은 IEC, EIA드 여러 국제 규격에 제시되어 있으며, 본 연구의 대상이 된 ATM교환기 시스템에서 PCB/Connector Assembly의 진동환경에서 접촉저항 측정과 관련된 접촉저항 임계치 및 측정법은 IEEE 규격 및 Bellcore 규격에 규정되어 있다. Bellcore에는 주어진 진동시험주기 전후에 IEC 규격의 LLCR(Low Level Contact Resistance) 측정회로를 이용한 측정법이 규정되어 있고, 냉각팬 및 주위 환경진동이 가해지는 동안의 영향에 대한 시험법은 규정되어 있지 않다. 본 연구에서는 한국통신의 전자장비 운용환경시험 조건의 진동에서 ATM 교환기 시스템에 사용되는 PCB/Connector Assembly 커넥터 접촉부의 접촉저항 변화와 PCB 진동에 의한 영향을 시험하였다.proach)등이 제시되었고 평면파 영역에 한하여 해서되어져 왔다. 본 논문에서는 분할 접근 방법(Segmentation Approach)을 이용하여 다공 요소로 이루어진 소음기를 해석하는데 적용하였다.로 성능 및 안정도에 영향을 미치므로 주의 깊게 선정해야 한다. 방법의 실질적인 적용에는 어려움이 있다. 본 연구에서는 기존의 방법들의 단점을 극복할 수 있는 새로운 회귀적 모우드 변수 규명 방법을 개발하였다. 이는 Fassois와 Lee가 ARMAX모델의 계수를 효율적으로 추정하기 위하여 개발한 뱉치방법인 Suboptimum Maximum Likelihood 방법[5]를 기초로 하여 개발하였다. 개발된 방법의 장점은 응답 신호에 유색잡음이 존재하여도 모우드 변수들을 항상 정확하게 구할 수 있으며, 또한 알고리즘의 안정성이 보장된 것이다.. 여기서는 실험실 수준의 평 판모델을 제작하고 실제 현장에서 이루어질 수 있는 진동제어 구조물에 대 한 동적실험 및 FRS를 수행하는 과정과 동일하게 따름으로써 실제 발생할 수 있는 오차나 error를 실험실내의 차원에서 파악하여 진동원을 있는 구조 물에 대한 진동제어기술을 보유하고자 한다. 이용한 해마의 부피측정은 해마경화증 환자의 진단에 있어 육안적인 MR 진단이 어려운 제한된 경우에만 실제적 도움을 줄 수 있는 보조적인 방법으로 생각된다.ofile whereas relaxivity at high field is not affected by τS. On the other hand, the change in τV does not affect low field profile but strongly in fluences on both inflection fie이 and the maximum relaxivity value. The results shows a fluences on both inflection field and the maximum relaxivity v

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Ciphering Scheme and Hardware Implementation for MPEG-based Image/Video Security (DCT-기반 영상/비디오 보안을 위한 암호화 기법 및 하드웨어 구현)

  • Park Sung-Ho;Choi Hyun-Jun;Seo Young-Ho;Kim Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.2 s.302
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    • pp.27-36
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    • 2005
  • This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.

Wire Recognition on the Chip Photo based on Histogram (칩 사진 상의 와이어 인식 방법)

  • Jhang, Kyoungson
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.5
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    • pp.111-120
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    • 2016
  • Wire recognition is one of the important tasks in chip reverse engineering since connectivity comes from wires. Recognized wires are used to recover logical or functional representation of the corresponding circuit. Though manual recognition provides accurate results, it becomes impossible, as the number of wires is more than hundreds of thousands. Wires on a chip usually have specific intensity or color characteristics since they are made of specific materials. This paper proposes two stage wire recognition scheme; image binarization and then the process of determining whether regions in binary image are wires or not. We employ existing techniques for two processes. Since the second process requires the characteristics of wires, the users needs to select the typical wire region in the given image. The histogram characteristic of the selected region is used in calculating histogram similarity between the typical wire region and the other regions. The first experiment is to select the most appropriate binarization scheme for the second process. The second experiment on the second process compares three proposed methods employing histogram similarity of grayscale or HSV color since there have not been proposed any wire recognition method comparable by experiment. The best method shows more than 98% of true positive rate for 25 test examples.

The Design of Multi-channel Asynchronous Communication IC Using FPGA (FPGA를 이용한 다채널 비동기 통신용 IC 설계)

  • Ock, Seung-Kyu;Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.1
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    • pp.28-37
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    • 2010
  • In this paper, the IC (Integrated Circuit) for multi-channel asynchronous communication was designed by using FPGA and VHDL language. The existing chips for asynchronous communication that has been used commercially are composed of one to two channels. Therefore, when communication system with two channels or more is made, the cost becomes high and it becomes complicated for communication system to be realized and also has very little buffer, load that is placed into Microprocessor increases heavily in case of high speed communication or transmission of high-capacity data. The designed IC was improved the function and performance of communication system and reduced costs by designing 8 asynchronous communication channels with only one IC, and it has the size of transmitter/receiver buffer with 256 bytes respectively and consequently high speed communication became possible. To detect errors between communications, it was designed with digital filter and check-sum logic and channel MUX logic so that the malfunction can be prevented and errors can be detected more easily and input/output port regarding each communication channel can be used flexibly and consequently the reliability of system was improved. It was composed and simulated logic of VHDL described by using Cyclone II Series EP2C35F672C8 and QuartusII V8.1 of ALTERA company. In order to show the performance of designed IC, the test was conducted successfully in QuartusII simulation and experiment and the excellency was compared with TL16C550A of TI (Texas Instrument) company and ATmegal28 general-purpose micro controller of ATMEL company that are used widely as chips for asynchronous communication.

Novel Extraction Method for Unknown Chip PDN Using De-Embedding Technique (De-Embedding 기술을 이용한 IC 내부의 전원분배망 추출에 관한 연구)

  • Kim, Jongmin;Lee, In-Woo;Kim, Sungjun;Kim, So-Young;Nah, Wansoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.6
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    • pp.633-643
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    • 2013
  • GDS format files, as well as layout of the chip are noticeably needed so as to analyze the PDN (Power Delivery Network) inside of IC; however, commercial IC in the market has not supported design information which is layout of IC. Within this, in terms of IC having on-chip PDN, characteristic of inside PDN of the chip is a core parameter to predict generated noise from power/ground planes. Consequently, there is a need to scrutinize extraction method for unknown PDN of the chip in this paper. To extract PDN of the chip without IC circuit information, the de-embedding test vehicle is fabricated based on IEC62014-3. Further more, the extracted inside PDN of chip from de-embedding technique adopts the Co-simulation model which composes PCB, QFN (Quad-FlatNo-leads) Package, and Chip for the PDN, applied Co-simulation model well corresponds with impedance from measured S-parameters up to 4 GHz at common measured and simulated points.