• Title/Summary/Keyword: synchronous signal

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A Study on the Utility Interactive Photovoltaic System Using a Chopper and PWM Voltage Source Inverter for Air Conditioner a Clinic room (병실 냉.난방을 위한 초퍼와 PWM 전압형 인버터를 이용한 계통 연계형 태양광 발전시스템에 관한 연구)

  • Hwang, L.H.;Na, S.K.
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.2
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    • pp.360-369
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    • 2008
  • The solar cells should be operated at the maximum power point because its output characteristics were greatly fluctuated on the variation of insolation, temperature and load. It is necessary to install an inverter among electric power converts by means of the output power of solar cell is DC. The inverter is operated supply a sinusoidal current and voltage to the load and the interactive utility line. In this paper, the proposes a photovoltaic system is designed with a step up chopper and single phase PWM voltage source inverter. Synchronous signal and control signal was processed by one-chip microprocessor for stable modulation. The step up chopper is operated in continuous mode by adjusting the duty ratio so that the photovoltaic system tracks the maximum power point of solar cell without any influence on the variation of insolation and temperature for solar cell has typical dropping character. The single phase PWM voltage source inverter is consists of complex type of electric power converter to compensate for the defect, that is, solar cell cannot be develop continuously by connecting with the source of electric power for ordinary using. It can be cause the efect of saving electric power, from 10 to 20%. The single phase PWM voltage source inverter operates in situation, that its output voltage is in same phase with the utility voltage. The inverter are supplies an ac power with high factor and low level of harmonics to the load and the utility power system.

A Study on Correlation Processing Method of Multi-Polarization Observation Data by Daejeon Correlator (대전상관기의 다중편파 관측데이터 상관처리 방법에 관한 연구)

  • Oh, Se-Jin;Yeom, Jae-Hwan;Roh, Duk-Gyoo;Jung, Dong-Kyu;Hwang, Ju-Yeon;Oh, Chungsik;Kim, Hyo-Ryoung
    • Journal of the Institute of Convergence Signal Processing
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    • v.19 no.2
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    • pp.68-76
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    • 2018
  • In this paper, we describe the correlation processing method of multi-polarization observation data of the Daejeon Correlator. VLBI observations include single or multiple polarized observations depending on the type of object. Polarization observations are performed to observe the characteristics of the object. During the observations of the celestial object, polarization measurements are also performed to determine the delay values and causes of changes in the object. Correlation processing of polarization observation data of the Daejeon correlator is proposed by OCTAVIA of a synchronous reproduction processing apparatus that outputs data input to each antenna unit by using an output bit selection function to convert bits and the order of the data streams is changed, And the input of the Daejeon correlator is configured to perform the polarization correlation processing by conducting correlation processing by setting the existing stream number to be the same. Correlation processing is conducted on the test data observed for the polarization correlation processing and it is verified through experiments that the polarization correlation processing method of the proposed Daejeon correlator is effective.

MPSoC Design Space Exploration Based on Static Analysis of Process Network Model (프로세스 네트워크 모델의 정적 분석에 기반을 둔 다중 프로세서 시스템 온 칩 설계 공간 탐색)

  • Ahn, Yong-Jin;Choi, Ki-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.7-16
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    • 2007
  • In this paper, we introduce a new design environment for efficient multiprocessor system-on-chip design space exploration. The design environment takes a process network model as input system specification. The process network model has been widely used for modeling signal processing applications because of its excellent modeling power. However, it has limitation in predictability, which could cause severe problem for real time systems. This paper proposes a new approach that enables static analysis of a process network model by converting it to a hierarchical synchronous dataflow model. For efficient design space exploration in the early design step, mapping application to target architectures has been a crucial part for finding better solution. In this paper, we propose an efficient mapping algorithm. Our mapping algorithm supports both single bus architecture and multiple bus architecture. In the experiments, we show that the automatic conversion approach of the process network model for static analysis is performed successfully for several signal processing applications, and show the effectiveness of our mapping algorithm by comparing it with previous approaches.

DEVELOPMENT OF THE READOUT CONTROLLER FOR INFRARED ARRAY (적외선검출기 READOUT CONTROLLER 개발)

  • Cho, Seoung-Hyun;Jin, Ho;Nam, Uk-Won;Cha, Sang-Mok;Lee, Sung-Ho;Yuk, In-Soo;Park, Young-Sik;Pak, Soo-Jong;Han, Won-Yong;Kim, Sung-Soo
    • Publications of The Korean Astronomical Society
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    • v.21 no.2
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    • pp.67-74
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    • 2006
  • We have developed a control electronics system for an infrared detector array of KASINICS (KASI Near Infrared Camera System), which is a new ground-based instrument of the Korea Astronomy and Space science Institute (KASI). Equipped with a $512{\times}512$ InSb array (ALADDIN III Quadrant, manufactured by Raytheon) sensitive from 1 to $5{\mu}m$, KASINICS will be used at J, H, Ks, and L-bands. The controller consists of DSP(Digital Signal Processor), Bias, Clock, and Video boards which are installed on a single VME-bus backplane. TMS320C6713DSP, FPGA(Field Programmable Gate Array), and 384-MB SDRAM(Synchronous Dynamic Random Access Memory) are included in the DSP board. DSP board manages entire electronics system, generates digital clock patterns and communicates with a PC using USB 2.0 interface. The clock patterns are downloaded from a PC and stored on the FPGA. UART is used for the communication with peripherals. Video board has 4 channel ADC which converts video signal into 16-bit digital numbers. Two video boards are installed on the controller for ALADDIN array. The Bias board provides 16 dc bias voltages and the Clock board has 15 clock channels. We have also coded a DSP firmware and a test version of control software in C-language. The controller is flexible enough to operate a wide range of IR array and CCD. Operational tests of the controller have been successfully finished using a test ROIC (Read-Out Integrated Circuit).

Pattern classification of the synchronized EEG records by an auditory stimulus for human-computer interface (인간-컴퓨터 인터페이스를 위한 청각 동기방식 뇌파신호의 패턴 분류)

  • Lee, Yong-Hee;Choi, Chun-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.12
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    • pp.2349-2356
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    • 2008
  • In this paper, we present the method to effectively extract and classify the EEG caused by only brain activity when a normal subject is in a state of mental activity. We measure the synchronous EEG on the auditory event when a subject who is in a normal state thinks of a specific task, and then shift the baseline and reduce the effect of biological artifacts on the measured EEG. Finally we extract only the mental task signal by averaging method, and then perform the recognition of the extracted mental task signal by computing the AR coefficients. In the experiment, the auditory stimulus is used as an event and the EEG was recorded from the three channel $C_3-A_1$, $C_4-A_2$ and $P_Z-A_1$. After averaging 16 times for each channel output, we extracted the features of specific mental tasks by modeling the output as 12th order AR coefficients. We used total 36th order coefficient as an input parameter of the neural network and measured the training data 50 times per each task. With data not used for training, the rate of task recognition is 34-92 percent on the two tasks, and 38-54 percent on the four tasks.

A Study on the Power Converter Control of Utility Interactive Photovoltaic Generation System (계통 연계형 태양광 발전시스템의 전력변환기 제어에 관한 연구)

  • Na, Seung-Kwon;Ku, Gi-Jun;Kim, Gye-Kuk
    • Journal of the Korea Society of Computer and Information
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    • v.14 no.2
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    • pp.157-168
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    • 2009
  • In this paper, a photovoltaic system is designed with a step up chopper and single phase PWM(Pulse Width Modulation) voltage source inverter. Where proposed Synchronous signal and control signal was processed by one-chip microprocessor for stable modulation. The step up chopper operates in continuous mode by adjusting the duty ratio so that the photovoltaic system tracks the maximum power point of solar cell without any influence on the variation of insolation and temperature because solar cell has typical voltage and current dropping character. The single phase PWM voltage source the inverter using inverter consists of complex type of electric power converter to compensate for the defect, that is, solar cell cannot be developed continuously by connecting with the source of electric power for ordinary use. It can cause the effect of saving electric power. from 10 to 20[%]. The single phase PWM voltage source inverter operates in situation that its output voltage is in same phase with the utility voltage. In order to enhance the efficiency of photovoltaic cells, photovoltaic positioning system using sensor and microprocessor was design so that the fixed type of photovoltaic cells and photovoltaic positioning system were compared. In result, photovoltaic positioning system can improved 5% than fixed type of photovoltaic cells. In addition, I connected extra power to the system through operating the system voltage and inverter power in a synchronized way by extracting the system voltage so that the phase of the system and the phase of single-phase inverter of PWM voltage type can be synchronized. And, It controlled in order to provide stable pier to the load and the system through maintaining high lurer factor and low output power of harmonics.

IoT Security Channel Design Using a Chaotic System Synchronized by Key Value (키값 동기된 혼돈계를 이용한 IoT의 보안채널 설계)

  • Yim, Geo-Su
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.5
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    • pp.981-986
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    • 2020
  • The Internet of Things refers to a space-of-things connection network configured to allow things with built-in sensors and communication functions to interact with people and other things, regardless of the restriction of place or time.IoT is a network developed for the purpose of services for human convenience, but the scope of its use is expanding across industries such as power transmission, energy management, and factory automation. However, the communication protocol of IoT, MQTT, is a lightweight message transmission protocol based on the push technology and has a security vulnerability, and this suggests that there are risks such as personal information infringement or industrial information leakage. To solve this problem, we designed a synchronous MQTT security channel that creates a secure channel by using the characteristic that different chaotic dynamical systems are synchronized with arbitrary values in the lightweight message transmission MQTT protocol. The communication channel we designed is a method of transmitting information to the noise channel by using characteristics such as random number similarity of chaotic signals, sensitivity to initial value, and reproducibility of signals. The encryption method synchronized with the proposed key value is a method optimized for the lightweight message transmission protocol, and if applied to the MQTT of IoT, it is believed to be effective in creating a secure channel.

An Enhanced DESYNC Scheme for Simple TDMA Systems in Single-Hop Wireless Ad-Hoc Networks (단일홉 무선 애드혹 네트워크에서 단순 TDMA 시스템을 위한 DESYNC 알고리즘 개선 방안)

  • Hyun, Sanghyun;Lee, Jeyul;Yang, Dongmin
    • KIPS Transactions on Computer and Communication Systems
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    • v.3 no.9
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    • pp.293-300
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    • 2014
  • TDMA(Time Division Multiple Access) is a channel access scheme for shared medium networks. The shared frequency is divided into multiple time slots, some of which are assigned to a user for communication. Techniques for TDMA can be categorized into two classes: synchronous and asynchronous. Synchronization is not suitable for small scale networks because it is complicated and requires additional equipments. In contrast, in DESYNC, a biologically-inspired algorithm, the synchronization can be easily achieved without a global clock or other infrastructure overhead. However, DESYNC spends a great deal of time to complete synchronization and does not guarantee the maximum time to synch completion. In this paper, we propose a lightweight synchronization scheme, C-DESYNC, which counts the number of participating nodes with GP (Global Packet) signal including the information about the starting time of a period. The proposed algorithm is mush simpler than the existing synchronization TDMA techniques in terms of cost-effective method and guarantees the maximum time to synch completion. Our simulation results show that C-DESYNC guarantees the completion of the synchronization process within only 3 periods regardless of the number of nodes.

Design of a Low-Power 8-bit 1-MS/s CMOS Asynchronous SAR ADC for Sensor Node Applications (센서 노드 응용을 위한 저전력 8비트 1MS/s CMOS 비동기 축차근사형 ADC 설계)

  • Jihun Son;Minseok Kim;Jimin Cheon
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.16 no.6
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    • pp.454-464
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    • 2023
  • This paper proposes a low-power 8-bit asynchronous SAR ADC with a sampling rate of 1 MS/s for sensor node applications. The ADC uses bootstrapped switches to improve linearity and applies a VCM-based CDAC switching technique to reduce the power consumption and area of the DAC. Conventional synchronous SAR ADCs that operate in synchronization with an external clock suffer from high power consumption due to the use of a clock faster than the sampling rate, which can be overcome by using an asynchronous SAR ADC structure that handles internal comparisons in an asynchronous manner. In addition, the SAR logic is designed using dynamic logic circuits to reduce the large digital power consumption that occurs in low resolution ADC designs. The proposed ADC was simulated in a 180-nm CMOS process, and at a 1.8 V supply voltage and a sampling rate of 1 MS/s, it consumed 46.06 𝜇W of power, achieved an SNDR of 49.76 dB and an ENOB of 7.9738 bits, and obtained a FoM of 183.2 fJ/conv-step. The simulated DNL and INL are +0.186/-0.157 LSB and +0.111/-0.169 LSB.

MEASUREMENT OF PULPAL BLOOD FLOW USING A LASER DOPPLER FLOWMETER (Laser Doppler flowmeter를 이용한 치수혈류 측정)

  • Ban, Tae-Whan;Lee, Jae-Sang;Kim, Sung-Kyo
    • Restorative Dentistry and Endodontics
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    • v.24 no.4
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    • pp.560-569
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    • 1999
  • Blood supply rather than nerve supply implies pulp vitality. To evaluate pulp vitality clinically, electric pulp test and thermal test which are based on sensory nerve response have been used in addition to many auxiliary data such as past dental history, visual inspection, radiographic examination, percussion, palpation and transillumination test. However, reactivity of the nerves to the stimulation is not synonymous with normalcy. Therefore measurement of pulpal blood flow using a laser Doppler flowmeter became a new trial to test the pulp vitality. The purpose of the present study was to evaluate normal pulpal blood flow level of maxillary teeth in adult to provide a guideline in determining the vitality of dental pulp. Pulpal blood flow was measured in maxillary central and lateral incisors, canines, first and second premolars and first molars of seventy nine adults of 22 - 30 years old using a laser Doppler flowmeter (PeriFlux 4001, Perimed Co., Stockholm, Sweden, 780 nm infrared laser, 1mW). For directly-made splints, silicone rubber impressions were taken directly from the mouth. For indirectly-made splints, alginate impressions were taken from the mouth and stone cast were made. After making depressions on the buccal surfaces of the cast teeth to indicate the hole positions, second impressions with vinyl polysyloxane putty were taken from the cast. Holes for the laser probes were made at the putty impressions 4mm above the gingival level. Laser probe (PF416 dental probe, 1.5mm) was inserted in the prepared hole and the splint was set in the mouth. After 10 minutes of patient relaxing, pulpal blood flow was recorded for 5 minutes on each tooth. The recorded flow was saved in the computer and calculated with a software 'Perisoft' version 5.1. Pulpal blood flow was also recorded in six teeth of five individuals with no response to electric pulp test and cold test, with periapical radiolucency, or with history of root canal treatment to compare with nonvital teeth. The difference between the mean flow values of each group of teeth were analyzed using one-way ANOVA and Duncan's Multiple Range test. The results were as follows: 1. The average pulpal blood flow values of all the tested teeth of each location were between 9 - 16 Perfusion Unit. Pulpal blood flow value was highest in maxillary lateral incisors, followed by first premolars, second premolars, canines, central incisors, and then first molars (p<0.01). 2. In six anterior teeth, indirectly-made splint group showed higher pulpal blood flow values than directly-made splint group (p<0.01). In posterior teeth, however, there was no significant flow value difference between directly-made splint group and indirectly-made splint one (p>0.05). 3. Teeth with vital pulps showed higher signal values than teeth with nonvital pulps (p<0.01), and the flow photographs showed heartbeat-synchronous fluctuations and vasomotions, while those were absent in non vital tooth.

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