• Title/Summary/Keyword: switching property

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Enhanced Electrochromic Switching Performance in Nickel Hydroxide Thin Film by Ultra-Thin Ni Metal (니켈금속 박막에서 수산화 니켈 박막의 전기변색속도 개선)

  • Kim, Woo-Seong;Seong, Jeong-Sub
    • Journal of Korean Ophthalmic Optics Society
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    • v.7 no.2
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    • pp.163-167
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    • 2002
  • Improved optical switching property of electrochromic nickel hydroxide/nickel glass thin film is reported. Nickel metal film was deposited on glass by e-beam evaporation before following electrochemical redox cycling to form nickel hydroxide for electrochromic activation. Without ITO (indium tin oxide) layer as electrical conductor, this electrode showed more rapid coloration rate than nickel hydroxide film on ITO substrate in the change of the electric voltage and optical transmittance. XPS analysis confirmed the existence of ultra-thin nickel metal layer (${\sim}10{\AA}$) between electrochemically grown nickel hydroxide and the glass substrate. It is concluded that the remained nickel metal nano-layer attribute to the conduction layer and the enhanced response time.

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Dynamic Routing Algorithm based on Minimum Path-Cost in Optical Burst Switching Networks (광 버스트 스위칭 망에서 최소 경로비용 기반의 동적 경로배정 기법)

  • Lee Hae joung;Song Kyu yeop;Yoo Kyoung min;Yoo Wan;Kim Young chon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.3B
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    • pp.72-84
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    • 2005
  • Optical burst switching networks usually employ one-way reservation by sending a burst control packet with a specific offset time, before transmitting each data burst Same. Due to such a Property, burst-contentions occur when multiple bursts contend for the same wavelength in the same output link simultaneously in a node, leading to burst losses, eventually degrading the quality of service. Therefore, in this paper, we propose a dynamic routing algorithm using minimum local state information in order to decrease burst-contentions. In this proposed scheme, if burst loss rate exceeds a threshold value at a certain node, a new alternative routing path is chosen according to burst priority and location of burst generation, which enables the contending bursts to detour around the congested link. Moreover, for reducing the effect of sending bursts on the primary path due to the alternative path, we also apply a minimum path-cost based routing on link-cost concept. Our simulation results show that proposed scheme improves the network performance in terms of burst loss probability and throughput by comparing with conventional one.

Power Minimization Techniques for Logic Circuits Utilizing Circuit Symmetries (회로의 대칭성을 이용한 다단계 논리회로 회로에서의 전력 최소화 기법)

  • 정기석;김태환
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.9
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    • pp.504-511
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    • 2003
  • The property of circuit symmetry has long been applied to the Problem of minimizing the area and timing of multi-level logic circuits. In this paper, we focus on another important design objective, power minimization, utilizing circuit symmetries. First, we analyze and establish the relationship between several types of circuit symmetry and their applicability to reducing power consumption of the circuit, proposing a set of re-synthesis techniques utilizing the symmetries. We derive an algorithm for detecting the symmetries (among the internal signals as well as the primary inputs) on a given circuit implementation. We then propose effective transformation algorithms to minimize power consumption using the symmetry information detected from the circuit. Unlike many other approaches, our transformation algorithm guarantees monotonic improvement in terms of switching activities, which is practically useful in that user can check the intermediate re-synthesized designs in terms of the degree of changes of power, area, timing, and the circuit structure. We have carried out experiments on MCNC benchmark circuits to demonstrate the effectiveness of our algorithm. On average we reduced the power consumption of circuits by 12% with relatively little increase of area and timing.

Resistive Switching Effect of the $In_2O_3$ Nanoparticles on Monolayered Graphene for Flexible Hybrid Memory Device

  • Lee, Dong Uk;Kim, Dongwook;Oh, Gyujin;Kim, Eun Kyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.396-396
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    • 2013
  • The resistive random access memory (ReRAM) has several advantages to apply next generation non-volatile memory device, because of fast switching time, long retentions, and large memory windows. The high mobility of monolayered graphene showed several possibilities for scale down and electrical property enhancement of memory device. In this study, the monolayered graphene grown by chemical vapor deposition was transferred to $SiO_2$ (100 nm)/Si substrate and glass by using PMMA coating method. For formation of metal-oxide nanoparticles, we used a chemical reaction between metal films and polyamic acid layer. The 50-nm thick BPDA-PDA polyamic acid layer was coated on the graphene layer. Through soft baking at $125^{\circ}C$ or 30 min, solvent in polyimide layer was removed. Then, 5-nm-thick indium layer was deposited by using thermal evaporator at room temperature. And then, the second polyimide layer was coated on the indium thin film. After remove solvent and open bottom graphene layer, the samples were annealed at $400^{\circ}C$ or 1 hr by using furnace in $N_2$ ambient. The average diameter and density of nanoparticle were depending on annealing temperature and times. During annealing process, the metal and oxygen ions combined to create $In_2O_3$ nanoparticle in the polyimide layer. The electrical properties of $In_2O_3$ nanoparticle ReRAM such as current-voltage curve, operation speed and retention discussed for applictions of transparent and flexible hybrid ReRAM device.

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Effects of Electrostatic Discharge Stress on Current-Voltage and Reverse Recovery Time of Fast Power Diode

  • Bouangeune, Daoheung;Choi, Sang-Sik;Cho, Deok-Ho;Shim, Kyu-Hwan;Chang, Sung-Yong;Leem, See-Jong;Choi, Chel-Jong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.495-502
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    • 2014
  • Fast recovery diodes (FRDs) were developed using the $p^{{+}{+}}/n^-/n^{{+}{+}}$ epitaxial layers grown by low temperature epitaxy technology. We investigated the effect of electrostatic discharge (ESD) stresses on their electrical and switching properties using current-voltage (I-V) and reverse recovery time analyses. The FRDs presented a high breakdown voltage, >450 V, and a low reverse leakage current, < $10^{-9}$ A. From the temperature dependence of thermal activation energy, the reverse leakage current was dominated by thermal generation-recombination and diffusion, respectively, at low and high temperature regions. By virtue of the abrupt junction and the Pt drive-in for the controlling of carrier lifetime, the soft reverse recovery behavior could be obtained along with a well-controlled reverse recovery time of 21.12 ns. The FRDs exhibited excellent ESD robustness with negligible degradations in the I-V and the reverse recovery characteristics up to ${\pm}5.5$ kV of HBM and ${\pm}3.5$ kV of IEC61000-4-2 shocks. Likewise, transmission line pulse (TLP) analysis reveals that the FRDs can handle the maximum peak pulse current, $I_{pp,max}$, up to 30 A in the forward mode and down to - 24 A in the reverse mode. The robust ESD property can improve the long term reliability of various power applications such as automobile and switching mode power supply.

Multicast using Label Aggregation in MPLS Environment (MPLS환경에서의 Label Aggregation을 통한 Multicast 지원 방안)

  • Park, Pong-Min;Kim, Gyeong-Mok;Oh, Young-Hwan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.10 s.340
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    • pp.9-16
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    • 2005
  • The growth of the Internet over the last several years has placed a tremendous strain on the high bandwidth Hence, the amount of internet traffic has risen sharply and it has demanded to use the limited resource. MPLS (Multiprotocol Label Switching) is regarded as a core technology for migrating to the next generation Internet. It is important to reduce the number of labels and LSP(Label Switched Path)s for network resource management. In this thesis, we considered an MPLS multicast mechanism in the current Internet. The scalability problem due to lack of labels and multicast property is one of the serious problems in MPLS multicast mechanism, we proposed a Label Aggregation algorithm that the multicast packets on same link in MPLS allocates the same label for the scalability problem. In order to support the proposed algorithm we defined a new LDP(Label Distribution Protocol) multicast field and multicast packet is copied and transmitted for multicast group links of next node in LSR(label Switch Router).

Single Crystal Silicon Thin Film Transistor using 501 Wafer for the Switching Device of Top Emission Type AMOLEDs (SOI 웨이퍼를 이용한 Top emission 방식 AMOLEDs의 스위칭 소자용 단결정 실리콘 트랜지스터)

  • Chang, Jae-Won;Kim, Hoon;Shin, Kyeong-Sik;Kim, Jai-Kyeong;Ju, Byeong-Kwon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.4
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    • pp.292-297
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    • 2003
  • We fabricated a single crystal silicon thin film transistor for active matrix organic light emitting displays(AMOLEDs) using silicon on insulator wafer (SOI wafer). Poly crystal silicon thin film transistor(poly-Si TFT) Is actively researched and developed nowsdays for a pixel switching devices of AMOLEDs. However, poly-Si TFT has some disadvantages such as high off-state leakage currents and low field-effect mobility due to a trap of grain boundary in active channel. While single crystal silicon TFT has many advantages such as high field effect mobility, low off-state leakage currents, low power consumption because of the low threshold voltage and simultaneous integration of driving ICs on a substrate. In our experiment, we compared the property of poly-Si TFT with that of SOI TFT. Poly-Si TFT exhibited a field effect mobility of 34 $\textrm{cm}^2$/Vs, an off-state leakage current of about l${\times}$10$\^$-9/ A at the gate voltage of 10 V, a subthreshold slope of 0.5 V/dec and on/off ratio of 10$\^$-4/, a threshold voltage of 7.8 V. Otherwise, single crystal silicon TFT on SOI wafer exhibited a field effect mobility of 750 $\textrm{cm}^2$/Vs, an off-state leakage current of about 1${\times}$10$\^$-10/ A at the gate voltage of 10 V, a subthreshold slope of 0.59 V/dec and on/off ratio of 10$\^$7/, a threshold voltage of 6.75 V. So, we observed that the properties of single crystal silicon TFT using SOI wafer are better than those of Poly Si TFT. For the pixel driver in AMOLEDs, the best suitable pixel driver is single crystal silicon TFT using SOI wafer.

Design of a Small-Area, Low-Power, and High-Speed 128-KBit EEPROM IP for Touch-Screen Controllers (터치스크린 컨트롤러용 저면적, 저전력, 고속 128Kb EEPROMIP 설계)

  • Cho, Gyu-Sam;Kim, Doo-Hwi;Jang, Ji-Hye;Lee, Jung-Hwan;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2633-2640
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    • 2009
  • We design a small-area, low-power, and high-speed EEPROM for touch screen controller IC. As a small-area EEPROM design, a SSTC (side-wall selective transistor) cell is proposed, and high-voltage switching circuits repeated in the EEPROM core circuit are optimized. A digital data-bus sensing amplifier circuit is proposed as a low-power technology. For high speed, the distributed data-bus scheme is applied, and the driving voltage for both the EEPROM cell and the high-voltage switching circuits uses VDDP (=3.3V) which is higher than the logic voltage, VDD (=1.8V), using a dual power supply. The layout size of the designed 128-KBit EEPROMIP is $662.31{\mu}m{\times}1314.89{\mu}m$.

The reduction of etching damage in lead-zirconate-titanate thin films using Inductively Coupled Plasma (Inductively Coupled Plasma를 이용한 lead-zirconate-titanate 박막의 식각 손상 개선)

  • Lim, Kyu-Tae;Kim, Kyoung-Tae;Kim, Dong-Pyo;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.178-181
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    • 2003
  • In this work, we etched PZT films with various additive gases ($O_2$ and Ar) in $Cl_2/CF_4$ plasmas, while mixing ratio was fixed at 8/2. After the etching, the plasma induced damages are characterized in terms of hysteresis curves, leakage current, retention properties, and switching polarization. When the electrical properties of PZT etched in $O_2$ or Ar added $Cl_2/CF_4$ were compared, the value of remanent polarization in $O_2$ added $Cl_2/CF_4$ plasma is higher than that in Ar. added plasma. The maximum etch rate of the PZT thin films was 145 nm/min for 30% Ar added $Cl_2/CF_4$ gas having mixing ratio of 8/2 and 110 nm/min for 10% $O_2$ added to that same gas mixture. In order to recover the ferroelectic properties of the PZT thin films after etching, we annealed the etched PZT thin films at $550^{\circ}C$ in an $O_2$ atmosphere for 10 min. From the hysteresis curves, leakage current, retention property and switching polarization, the reduction of the etching damage and the recovery via the annealing was turned out to be more effective when $O_2$ was added to $Cl_2/CF_4$ than Ar. X-ray diffraction (XRD) showed that the structural damage was lower when $O_2$ was added to $Cl_2/CF_4$. And the improvement in the ferroelectric properties of the annealed samples was consistent with the increased intensities of the (100) and the (200) PZT peaks.

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Post Annealing Treatment Introducing an Isotropy Magnetorsistive Property of Giant Magnetoresistance-Spin Valve Film for Bio-sensor (바이오센서용 거대자기저항-스핀밸브 박막이 등방성 자기저항 특성을 갖게 하는 후열처리 조건 연구)

  • Khajidmaa, P.;Park, Kwang-Jun;Lee, Sang-Suk
    • Journal of the Korean Magnetics Society
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    • v.23 no.3
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    • pp.98-103
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    • 2013
  • The magnetic easy axis of the ferromagnetic layer for the dual-type GMR-SV (giant magnetoresistance-spin valve) having NiFe/Cu/NiFe/IrMn/NiFe/Cu/NiFe multuilayer structure controlled by the post annealing treatment. The magnetoresistive curves of a dual-type IrMn based GMR-SV depending on the direction of the magnetic easy axis of the free and the pinned layers are measured by the different angles for the applied fields. By investigating the switching process of magnetization for an arbitrary measuring direction, the optimum annealing temperature having a steady and isotropy magnetic sensitivity of 2.0 %/Oe was $105^{\circ}C$. This result suggests that the in-plane orthogonal magnetization for the dual-type GMR-SV film can be used by a high sensitive biosensor.