• 전기전자학회논문지
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• 제26권2호
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• pp.299-305
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• 2022

다양한 물리적 신호를 디지털 신호 영역에서 처리하기 위해서 센서의 출력을 디지털로 변환하는 아날로그-디지털 변환기 (ADC)는 시스템 구성에 있어 매우 중요한 구성 블록이다. 센서 신호 처리를 위한 아날로그 회로의 역할을 디지털로 변환하는 추세에 따라 이러한 ADC의 해상도는 높아지는 추세이다. 또한 ADC는 모바일 기기의 배터리 효율 증대를 위해서 저전력 성능이 요구된다. 기존 integrating 시그마-델타 ADC의 경우 고해상도를 가지는 특징이 있지만, 저전압 조건과 미세화 공정으로 인해 적분기의 연산증폭기 이득 오차가 증가해 정확도가 낮아지게 된다. 이득 오차를 최소화하기 위해 버퍼 보상 기법을 적용할 수 있지만 버퍼의 전류가 추가된다는 단점이 있다. 본 논문에서는 이와 같은 단점을 보완하고자 버퍼를 스위칭하며 전류를 최소화시키고, 하이패스 바이어스 회로를 통해 settling time을 향상시켜 기존과 동일한 해상도를 갖는 ADC를 설계하였다.

• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1645-1655
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• 2016

A Dynamic Voltage Restorer (DVR) model is proposed to eliminate the short-term voltage disturbances that occur in the grid-connected mode, the switching between grid-connected mode and the stand-alone mode of a Microgrid. The proposed DVR structure is based on a conventional cascaded H-bridge multilevel inverter (MLI) topology; a novel composite control strategy is presented, which could ensure the compensation ability of voltage sag by the DVR. Moreover, the compensation to specified order of harmonic is added to implement effects that zero-steady error compensation to harmonic voltage in specified order of the presented control strategy; utilizing wind turbines-batteries units as DC energy storage components in the Microgrid, the operation cost of the DVR is reduced. When the Microgrid operates under stand-alone mode, the DVR can operate on microsource mode, which could ease the power supply from the main grid (distribution network) and consequently be favorable for energy saving and emission reduction. Simulation results validate the robustness and effective of the proposed DVR system.

• Journal of Electrical Engineering and Technology
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• 제12권1호
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• pp.466-471
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• 2017

Pantograph must be correctly attached to catenary to continuously supply stable power to railway vehicle, and the device used here is Auxiliary Air Compressor (ACM). The existing ACM used the DC motor that included commutator and brush. Since maintenance and repair by mechanical friction are essential for the DC motor, BLDC motor studies have been conducted to improve this. A three-phase BLDC motor does $120^{\circ}$ two-phase commutation through hall sensors in general. However, since hall sensor is vulnerable to heat and can run only when all three sensors work normally, sensorless control method has been studied to solve this. Using back EMF Zero Crossing Point (ZCP) detection method, this paper will introduce a stable switching sensing method that has a non-commutation area in a low speed zone.

• 전기학회논문지
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• 제66권9호
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• pp.1341-1350
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• 2017

In this paper, a high reliability 30W DC-DC converter is designed considering military standard (MIL-STD) for military applications such as guided weapon and aircraft. The performances and specifications of conventional military grade DC-DC converter are practically analyzed. The requirements for military grade DC-DC converter are established in consideration of MIL-STD and analysis results of conventional product. Two isolated DC-DC converter, forward and fly-back converter, are designed and compared to determine topology. From experimental results under various operating conditions, the forward topology satisfied performances and specifications of MIL-STD for military DC-DC converter.

• 제어로봇시스템학회논문지
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• 제20권7호
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• pp.756-759
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• 2014

DC/DC converters are commonly used to generate regulated DC output voltages with high-power efficiencies from different DC input sources. The converters can be applied in the regenerative braking of DC motors to return energy back to the supply, resulting in energy savings for the systems at periodic intervals. The fundamental converter studied here consists of an IGBT (Insulated Gate Bipolar mode Transistor), an inductor, a capacitor, a diode, a PWM-IC (Pulse Width Modulation Integrated Circuit) controller with oscillator, amplifier, and comparator. The PWM-IC is a core element and delivers the switching waveform to the gate of the IGBT in a stable manner. Display of the DC/DC converter output depends on the IGBT's changes in the threshold voltage and PWM-IC's pulse width. The simulation was conducted by PSIM software, and the hardware of the DC/DC converter was also implemented. It is necessary to study the fact that the output voltage depends on the duty rate of D, and to compare the output of experimental result with the theory and the simulation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 E
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• pp.2192-2194
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• 1999

In this study, We have accomplished a new approach to develope a cheap and compact pulsed $CO_2$ laser system. We used a fast SCR as switching device instead of a thyatron in the pulsed power supply. Using the Pulse transformer, energy in the condenser is tranferred to the secondary, electrodes of discharge tube, from the primary. An axial and water cooled type was adopted as the laser cavity. The laser performance characteristics as various parameters, such as gas pressure and pulse repetition rate, have been investigated. As a result, the maxium laser output was 12.3[W] at a pulse repetition rate of 120[pps] and a filling pressure of 12[Torr].

• 한국안전학회지
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• 제26권6호
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• pp.13-19
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• 2011

The purpose of this study is to examine the cause of damage to electrolytic capacitors and to present the heat generation mechanism in order to prevent the occurrence of similar problems. From the analysis results of electrolytic capacitors collected from accident sites, the fire causing area can be limited to the primary power supply for the initial accident. From the tests performed by applying overvoltage, surge, etc., it is thought that the fuse, varistor, etc., are not directly related to the accidents that occurred. The analysis of the characteristics using a switching regulator showed that the charge and discharge characteristics fell short of standard values. In addition, it is thought that heated electrolytic capacitors caused thermal stress to nearby resistances, elements, etc. It can be seen that the heat generation is governed by the over-ripple current, application of AC overvoltage, surge input, internal temperature increase, defective airtightness, etc. Therefore, when designing an electrolytic capacitor, it is necessary to comprehensively consider the correct polarity arrangement, appropriate voltage application, correct connection of equivalent series resistance(ESR) and equivalent series inductance(SEL), rapid charge and discharge control, sufficient margin of dielectric tangent, etc.

• ETRI Journal
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• 제42권5호
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• pp.773-780
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• 2020

A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

• ETRI Journal
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• 제33권5호
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• pp.752-758
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• 2011

This paper presents a clock and data recovery circuit that supports dual data rates of 5.4 Gbps and 3.24 Gbps for DisplayPort v1.2 sink device. A quarter-rate linear phase detector (PD) is used in order to mitigate high speed circuit design effort. The proposed linear PD results in better jitter performance by increasing up and down pulse widths of the PD and removes dead-zone problem of charge pump circuit. A voltage-controlled oscillator is designed with a 'Mode' switching control for frequency selection. The measured RMS jitter of recovered clock signal is 2.92 ps, and the peak-to-peak jitter is 24.89 ps under $2^{31}-1$ bit-long pseudo-random bit sequence at the bitrate of 5.4 Gbps. The chip area is 1.0 mm${\times}$1.3 mm, and the power consumption is 117 mW from a 1.8 V supply using 0.18 ${\mu}m$ CMOS process.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 G
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• pp.3215-3217
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• 1999

In this paper, a new structure of realizing switching control logic for Data Weighted Average Technique is suggested. It uses memory and adder for summing past binary input and this summed data is used to select one switch in control logic. This control logic acts in parallel regardless of resolution so increasing resolution don't affect on converting speed. In this reason, high speed and high resolution D/A converter based on Data Weighted Average Technique could be made. In this paper, 4 bits current mode thermometer code D/A converter is degined and simulated by using HSPICE. Simulated results show that new structure of D/A converter has more than 250MHz converting speed and less than 0.0003[LSB] INL error. It is very useful in low power circuit because of using 3.3 V supply voltage.