• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1015-1019
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• 2001

This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft switching commutation. In the first place, the steady state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment of set-up in laboratory system of this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.4
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• pp.334-340
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• 2004

In this paper, an efficient switching pattern to equalize the size of transformer is proposed for a multi-level inverter employing cascaded transformers. It is based on the prior selected harmonic elimination PWM(SHEPWM) method. Because the maximum magnetic flux imposed on each transformer becomes exactly equal each to each, all transformers can be designed with the same size regardless of their position. Therefore, identical full-bridge inverter units can be utilized, thus improving modularity and manufacturability. The fundamental idea of the proposed switching pattern is illustrated and then analyzed theoretically. The validity of the proposed switching strategy is verified by experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.4
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• pp.386-398
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• 1987

This paper is proposed the Suboptimal PAWM(Pulse Amplitude Width Modulation) for minimize harmonic effects generated by switching operation of PWM Inverter. This strategy determine one switching pattern at a fixed point(fundamental) voltage u1=1.2) which THD(Total Harmonic Distortion) are minimized in the suboptimal PWM strategy, and controls only frequency in the inverter while voltage control is carried out by DC Chopper in the DC Link. This strategy is applied at VSD(Variable Speed Drive) of Three phase induction moter, and acoustic noise of motor, line to line voltage and current of inverter, current harmonic spectrum was estimated and also compared with other switching strategy. From the results, the validity of this strategy can be verified.

• Proceedings of the KIEE Conference
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• 2002.06a
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• pp.55-59
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• 2002

This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft switching commutation. In the first place, the steady state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment of set-up in laboratory system of this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current -fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.2
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• pp.49-55
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• 2003

This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft switching commutation. In the first place, the steady state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment of set-up in laboratory system of this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

• The Transactions of the Korea Information Processing Society
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• v.1 no.1
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• pp.99-104
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• 1994

This paper proposes the method to process many pattern data 2-dimensionally at high speed in designing the physical of LSI. And this study shows that the switching network,which transmits pattern data between memory and processing elements at high speed on bidirection,has been designed using the barrel shifter and simulated with VHDL design system.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.918-921
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• 2004

In a motor drive, the current rating is directly related to the rating of a switching device, and the parallel switching operation for a cost reduction is the alternatives because it has the smaller current rating through current division. There are many investigations for the parallel switching operations to equaling the current division. However it remains many problems for practical usage. This paper proposes a new parallel operation which uses a parallel phase winding to remove the traditional effect of switching device such as saturation voltage according to the division of current. The proposed strategy is verified by theoretical and experimental results.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.1960-1962
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• 1998

Reference/modulating waveform continuity is not a necessary condition for the implementation of switching patterns for three-phase pulse-width modulated(PWM) converters. This is based on the fact that the converter phase-voltages do not need to be sinusoidal and switching pattern discontinuities do not degrade the quality of output/input voltage/current waveforms by introducing low-order harmonics if certain parameters are optimized. This paper introduces the selected harmonic elimination to reduce the switching frequency and low-order harmonics compared with continuous PWM techniques and some discontinues switching patterns for PWM converter.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.9
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• pp.445-452
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• 2001

Two switching signal patterns are proposed to prevent short circuit of PWM ac choppers. The voltage detection method and the current detection method are proposed to execute two switching signal patterns. In the voltage detection method, the dead-time has to be inserted to the switching signals after polarity of input voltage is checked by voltage transducer at input side. In the current detection method, the direction of load current is checked by current transducer at output side, and the dead-time delay is not considered. Controlling circuit built by current detection method is simple because the dead-time delay is considered. The experimental results are presented to prevent short circuit of ac chopper safely.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.448-455
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• 2015

A model predictive control (MPC) method without individual PWM has been recently researched to simplify and improve the control flexibility of a multilevel inverter. However, the input power of each H-bridge cell and the switching frequency of switching devices are unbalanced because of the use of a restricted switching state in the MPC method. This paper proposes a control method for balancing the switching patterns and cell power supplied from each isolated dc source of a cascaded H-bridge inverter. The supplied dc power from isolated dc sources of each H-bridge cells is balanced with the proposed cell balancing method. In addition, the switching frequency of each switching device of the CHB inverter becomes equal. A simulation and experimental results are presented with nine-level and five-level three-phase CHB inverter to validate the proposed balancing method.